Two-dimensional analytic modeling of very thin SOI MOSFETs
Woo, J.C.S., Terrill, K.W., Vasudev, P.K.
Published in IEEE transactions on electron devices (01.09.1990)
Published in IEEE transactions on electron devices (01.09.1990)
Get full text
Journal Article
Hot-Electron-Induced MOSFET Degradation - Model, Monitor, and Improvement
Chenming Hu, Simon C. Tam, Fu-Chieh Hsu, Ping-Keung Ko, Tung-Yi Chan, Terrill, K.W.
Published in IEEE journal of solid-state circuits (01.02.1985)
Published in IEEE journal of solid-state circuits (01.02.1985)
Get full text
Journal Article
Hot-electron-induced MOSFET degradation-Model, monitor, and improvement
Chenming Hu, Simon C. Tam, Fu-Chieh Hsu, Ping-Keung Ko, Tung-Yi Chan, Terrill, K.W.
Published in IEEE transactions on electron devices (01.02.1985)
Published in IEEE transactions on electron devices (01.02.1985)
Get full text
Journal Article
A new method for preventing CMOS latch-up
Terrill, K.W., Byrne, P.F., Zappe, H.P., Cheung, N.W., Hu, C.
Published in 1984 International Electron Devices Meeting (1984)
Published in 1984 International Electron Devices Meeting (1984)
Get full text
Conference Proceeding
Floating well CMOS and latchup
Zappe, H.P., Gupta, R.K., Terrill, K.W., Chenming Hu
Published in 1985 International Electron Devices Meeting (1985)
Published in 1985 International Electron Devices Meeting (1985)
Get full text
Conference Proceeding