Low-power and area efficient binary coded decimal adder design using a look up table-based field programmable gate array
Sworna, Zarrin Tasnim, UlHaque, Mubin, Tara, Nazma, Hasan Babu, Hafiz Md, Biswas, Ashis Kumar
Published in IET circuits, devices & systems (01.05.2016)
Published in IET circuits, devices & systems (01.05.2016)
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Journal Article
Logic Synthesis in Reversible PLA
Tara, Nazma, Babu, Hafiz Md Hasan, Matin, Nawshi
Published in 2016 29th International Conference on VLSI Design and 2016 15th International Conference on Embedded Systems (VLSID) (01.01.2016)
Published in 2016 29th International Conference on VLSI Design and 2016 15th International Conference on Embedded Systems (VLSID) (01.01.2016)
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Conference Proceeding
Journal Article
Realization of Reversible Logic in DNA Computing
Sarker, A., Ahmed, T., Rashid, S. M. M., Anwar, S., Jaman, L., Tara, N., Alam, M. M., Babu, H. M. H.
Published in 2011 IEEE 11th International Conference on Bioinformatics and Bioengineering (01.10.2011)
Published in 2011 IEEE 11th International Conference on Bioinformatics and Bioengineering (01.10.2011)
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Conference Proceeding