Search Results - "Takaki, Seje" :: K.UTB vyhledávací portál | TBU Library Retrieval Portal

TRANSISTOR DEVICE WITH GATE BOTTOM ISOLATION AND METHOD OF MAKING THEREOF

TRANSISTOR DEVICE WITH GATE BOTTOM ISOLATION AND METHOD OF MAKING THEREOF

by TAKAKI SEJE
Year of Publication 23.01.2017

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Patent

3D MULTILEVEL CONTACT TO A 3D MEMORY ARRAY AND METHOD OF MAKING THEREOF

3D MULTILEVEL CONTACT TO A 3D MEMORY ARRAY AND METHOD OF MAKING THEREOF

by TAKAKI SEJE
Year of Publication 11.10.2016

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Patent

Vertical thin film transistors with isolation

Vertical thin film transistors with isolation

by Takaki, Seje
Year of Publication 21.01.2020

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Patent

VERTICAL THIN FILM TRANSISTORS WITH ISOLATION

VERTICAL THIN FILM TRANSISTORS WITH ISOLATION

by Takaki, Seje
Year of Publication 30.05.2019

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Patent

RESISTIVE RANDOM ACCESS MEMORY DEVICE CONTAINING REPLACEMENT WORD LINES AND METHOD OF MAKING THEREOF

RESISTIVE RANDOM ACCESS MEMORY DEVICE CONTAINING REPLACEMENT WORD LINES AND METHOD OF MAKING THEREOF

by KIKUCHI, Shin, TAKAKI, Seje
Year of Publication 05.05.2021

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Patent

PARALLEL BIT LINE THREE-DIMENSIONAL RESISTIVE RANDOM ACCESS MEMORY

PARALLEL BIT LINE THREE-DIMENSIONAL RESISTIVE RANDOM ACCESS MEMORY

by TAKAKI, Seje
Year of Publication 10.01.2018

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Patent

Floating staircase word lines and process in a 3D non-volatile memory having vertical bit lines

Floating staircase word lines and process in a 3D non-volatile memory having vertical bit lines

by Takaki Seje
Year of Publication 29.08.2017

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Patent

VERTICAL FIELD EFFECT TRANSISTOR DEVICE AND METHOD OF MAKING THEREOF

VERTICAL FIELD EFFECT TRANSISTOR DEVICE AND METHOD OF MAKING THEREOF

by TAKAKI, Seje
Year of Publication 19.07.2017

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Patent

Parallel bit line three-dimensional resistive random access memory

Parallel bit line three-dimensional resistive random access memory

by Takaki Seje
Year of Publication 04.07.2017

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Patent

FLOATING STAIRCASE WORD LINES AND PROCESS IN A 3D NON-VOLATILE MEMORY HAVING VERTICAL BIT LINES

FLOATING STAIRCASE WORD LINES AND PROCESS IN A 3D NON-VOLATILE MEMORY HAVING VERTICAL BIT LINES

by Takaki Seje
Year of Publication 01.06.2017

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Patent

Self-selecting local bit line for a three-dimensional memory array

Self-selecting local bit line for a three-dimensional memory array

by Takaki Seje
Year of Publication 04.04.2017

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Patent

Floating staircase word lines and process in a 3D non-volatile memory having vertical bit lines

Floating staircase word lines and process in a 3D non-volatile memory having vertical bit lines

by Takaki Seje
Year of Publication 14.03.2017

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Patent

Word line connection for memory device and method of making thereof

Word line connection for memory device and method of making thereof

by Takaki Seje
Year of Publication 28.02.2017

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Patent

TRANSISTOR DEVICE WITH GATE BOTTOM ISOLATION AND METHOD OF MAKING THEREOF

TRANSISTOR DEVICE WITH GATE BOTTOM ISOLATION AND METHOD OF MAKING THEREOF

by TAKAKI, Seje
Year of Publication 01.02.2017

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Patent

VERTICAL FIELD EFFECT TRANSISTOR DEVICE AND METHOD OF MAKING THEREOF

VERTICAL FIELD EFFECT TRANSISTOR DEVICE AND METHOD OF MAKING THEREOF

by TAKAKI, Seje
Year of Publication 28.12.2016

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Patent

RESISTIVE RANDOM ACCESS MEMORY DEVICE CONTAINING REPLACEMENT WORD LINES AND METHOD OF MAKING THEREOF

RESISTIVE RANDOM ACCESS MEMORY DEVICE CONTAINING REPLACEMENT WORD LINES AND METHOD OF MAKING THEREOF

by KIKUCHI, Shin, TAKAKI, Seje
Year of Publication 11.03.2020

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Patent

MULTILEVEL CONTACT TO A 3D MEMORY ARRAY AND METHOD OF MAKING THEREOF

MULTILEVEL CONTACT TO A 3D MEMORY ARRAY AND METHOD OF MAKING THEREOF

by TAKAKI, SEJE
Year of Publication 26.10.2016

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Patent

Multilevel contact to a 3D memory array and method of making thereof

Multilevel contact to a 3D memory array and method of making thereof

by Takaki Seje
Year of Publication 20.09.2016

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Patent

PARALLEL BIT LINE THREE-DIMENSIONAL RESISTIVE RANDOM ACCESS MEMORY

PARALLEL BIT LINE THREE-DIMENSIONAL RESISTIVE RANDOM ACCESS MEMORY

by TAKAKI, Seje
Year of Publication 09.09.2016

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Patent

PARALLEL BIT LINE THREE-DIMENSIONAL RESISTIVE RANDOM ACCESS MEMORY

PARALLEL BIT LINE THREE-DIMENSIONAL RESISTIVE RANDOM ACCESS MEMORY

by TAKAKI Seje
Year of Publication 08.09.2016

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Patent