루프 종료 예측을 이용하여 프로세서의 루프 모드를 가속 또는 억제하기
ANNAMALAI ARUNACHALAM, EVERS MARIUS, THYAGARAJAN APARNA, JARVIS ANTHONY
Year of Publication 28.04.2021
Get full text
Year of Publication 28.04.2021
Patent
명령어 캐시 프리페치 스로틀
JONES WILLIAM E, WONG ANGELO, EVERS MARIUS, THYAGARAJAN APARNA, VENKATACHAR ASHOK TIRUPATHY
Year of Publication 28.07.2022
Get full text
Year of Publication 28.07.2022
Patent
USING LOOP EXIT PREDICTION TO ACCELERATE OR SUPPRESS LOOP MODE OF A PROCESSOR
THYAGARAJAN, Aparna, ANNAMALAI, Arunachalam, JARVIS, Anthony, EVERS, Marius
Year of Publication 15.06.2022
Get full text
Year of Publication 15.06.2022
Patent
INSTRUCTION CACHE PREFETCH THROTTLE
THYAGARAJAN, Aparna, WONG, Angelo, JONES, William E, VENKATACHAR, Ashok Tirupathy, EVERS, Marius
Year of Publication 21.02.2024
Get full text
Year of Publication 21.02.2024
Patent
Using loop exit prediction to accelerate or suppress loop mode of a processor
Evers, Marius, Annamalai, Arunachalam, Thyagarajan, Aparna, Jarvis, Anthony
Year of Publication 22.02.2022
Get full text
Year of Publication 22.02.2022
Patent