A 5-V Only 16-kbit Stacked-Capacitor MOS RAM
Koyanagi, M., Sakai, Y., Ishihara, M., Tazunoki, M., Hashimoto, N.
Published in IEEE journal of solid-state circuits (01.08.1980)
Published in IEEE journal of solid-state circuits (01.08.1980)
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Journal Article
A 5-V only 16-kbit stacked-capacitor MOS RAM
Koyanagi, M., Sakai, Y., Ishihara, M., Tazunoki, M., Hashimoto, N.
Published in IEEE transactions on electron devices (01.08.1980)
Published in IEEE transactions on electron devices (01.08.1980)
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Journal Article
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Year of Publication 17.06.1992
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Year of Publication 17.06.1992
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Year of Publication 14.02.1996
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Year of Publication 14.02.1996
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Digital computer with non-hierarchical memory
NAKAMURA, HISASHI, MURATA, JUN, TAZUNOKI, MASANORI, SAKOMURA, SHIGETOSHI, UCHIYAMA, HIROYUKI, ISHIHARA, MASAMICHI, SAKUTA, TOSHIYUKI
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Year of Publication 18.09.1991
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Year of Publication 23.10.1998
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Year of Publication 23.10.1998
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Special mode control method for dynamic random access memory
TAKEKUMA; TOSHITSUGU, ARAKAWA; WATARU, TAZUNOKI; MASANORI, ITO; YUTAKA, ITO; KAZUYA, IWAI; HIDETOSHI, SAKOMURA; SHIGETOSHI, SAKUTA; TOSHIYUKI, ISHIHARA; MASAMICHI
Year of Publication 25.04.1995
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Year of Publication 25.04.1995
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Wafer-scale semiconductor integrated circuit device
NAKAMURA, HISASHI, SASAKI, KEIJI, MISHIMAGI, HIROMITSU, SAKUTA, TOSHIYUKI, ITO, KAZUYA, HOMMA, MAKOTO, TAZUNOKI, MASANORI, OTSUKA, KANJI, SATOH, TOSHIHIKO, SAHARA, KUNISO, KAWAMURA, MASAO, ENOMOTO, MINORU, KUROSAWA, HINOKO, KURODA, SHIGEO
Year of Publication 03.09.1997
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Year of Publication 03.09.1997
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Special mode control method for dynamic random access memory
TAZUNOKI, MASANORI, ITO, YUTAKA, IWAI, HIDETOSHI, SAKOMURA, SHIGETOSHI, TAKEKUMA, TOSHITSUGU, ARAKAWA, WATARU, ITO, KAZUYA, SAKUTA, TOSHIYUKI, ISHIHARA, MASAMICHI
Year of Publication 19.05.1993
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Year of Publication 19.05.1993
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WAFER SCALE OR FULL WAFER MEMORY SYSTEM, PACKAGE, METHOD THEREOF AND WAFER PROCESSING METHOD EMPLOYED THEREIN
NAKAMURA, HISASHI, SASAKI, KEIJI, MISHIMAGI, HIROMITSU, SAHARA, KUNIZO, SAKUTA, TOSHIYUKI, ITO, KAZUYA, HOMMA, MAKOTO, TAZUNOKI, MASANORI, OTSUKA, KANJI, SATOH, TOSHIHIKO, KAWAMURA, MASAO, ENOMOTO, MINORU, KUROSAWA, HINOKO, KURODA, SHIGEO
Year of Publication 23.09.1996
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Year of Publication 23.09.1996
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Packaging of semiconductor integrated circuits
MASANORI TAZUNOKI, TOSHIYUKI SAKUTA, MINORU ENOMOTO, TOSHIHIKO SATOH, MAKOTO HOMMA, HIROMITSU MISHIMAGI, SHIGEO KURODA, KEIJI SASAKI, KAZUYA ITO, KUNIZO SAHARA, HISASHI NAKAMURA, KANJI OTSUKA, MASEO KAWAMURA, HINOKO KUROSAWA
Year of Publication 23.02.1996
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Year of Publication 23.02.1996
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Packaging of semiconductor integrated circuits
MISHIMAGI HIROMITSU, OTSUKA KANJI, NAKAMURA HISASHI, ENOMOTO MINORU, KAWAMURA MASAO, TAZUNOKI MASANORI, KURODA SHIGEO, ITO KAZUYA, SATOH TOSHIHIKO, SAKUTA TOSHIYUKI, SASAKI KEIJI, SAHARA KUNIZO, HOMMA MAKOTO, KUROSAWA HINOKO
Year of Publication 01.09.1995
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Year of Publication 01.09.1995
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