Vertical Structure NAND flash array integration with paired FinFET multi-bit scheme for high-density NAND flash memory application
June-Mo Koo, Tae-Eung Yoon, Taehee Lee, Sungjae Byun, Young-Gu Jin, Wonjoo Kim, Sukpil Kim, Jongbong Park, Junseok Cho, Jeong-Dong Choe, Choong-Ho Lee, Jong Jin Lee, Je-Woo Han, Yunseung Kang, Sangjun Park, Byoungho Kwon, Yong-Ju Jung, Inkyoung Yoo, Yoondong Park
Published in 2008 Symposium on VLSI Technology (01.06.2008)
Published in 2008 Symposium on VLSI Technology (01.06.2008)
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Conference Proceeding
Paired FinFET Charge Trap Flash Memory for Vertical High Density Storage
Kim, S., Kim, W., Hyun, J., Byun, S., Koo, J., Lee, J., Cho, K., Lim, S., Park, J., Yoo, I.-K., Lee, C.-H., Park, D., Park, Y.
Published in 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers (2006)
Published in 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers (2006)
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