Improved TDDB Reliability and Interface States in 5-nm Hf0.5Zr0.5O2 Ferroelectric Technologies Using NH₃ Plasma and Microwave Annealing
Chen, Yi-Hsuan, Su, Chun-Jung, Yang, Ting-Hsin, Hu, Chenming, Wu, Tian-Li
Published in IEEE transactions on electron devices (01.04.2020)
Published in IEEE transactions on electron devices (01.04.2020)
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Demonstration of Highly Robust 5 nm Hf0.5Zr0.5O₂ Ultra-Thin Ferroelectric Capacitor by Improving Interface Quality
Liang, Yan-Kui, Wu, Jui-Sheng, Teng, Chih-Yu, Ko, Hua-Lun, Luc, Quang-Ho, Su, Chun-Jung, Chang, Edward-Yi, Lin, Chun-Hsiung
Published in IEEE electron device letters (01.09.2021)
Published in IEEE electron device letters (01.09.2021)
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Effects of Annealing on Ferroelectric Hafnium-Zirconium-Oxide-Based Transistor Technology
Chen, Yi-Hsuan, Su, Chun-Jung, Hu, Chenming, Wu, Tian-Li
Published in IEEE electron device letters (01.03.2019)
Published in IEEE electron device letters (01.03.2019)
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Robust Binary Neural Network Operation From 233 K to 398 K via Gate Stack and Bias Optimization of Ferroelectric FinFET Synapses
De, Sourav, Le, Hoang-Hiep, Qiu, Bo-Han, Baig, Md. Aftab, Sung, Po-Jung, Su, Chun-Jung, Lee, Yao-Jen, Lu, Darsen D.
Published in IEEE electron device letters (01.08.2021)
Published in IEEE electron device letters (01.08.2021)
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Innovative Recovery Strategy for MFIS-FeFETs at Optimal Timing With Robust Endurance: Fast-Unipolar Pulsing (100 ns), Nearly Zero Memory Window Loss (0.02%), and Self-Tracking Circuit Design
Wu, Cheng-Hung, Liu, Jay, Zheng, Xun-Ting, Chuang, Han-Fu, Tseng, Yi-Ming, Kobayashi, Masaharu, Su, Chun-Jung, Hu, Vita Pi-Ho
Published in IEEE transactions on electron devices (01.05.2024)
Published in IEEE transactions on electron devices (01.05.2024)
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Fabrication of Vertically Stacked Nanosheet Junctionless Field-Effect Transistors and Applications for the CMOS and CFET Inverters
Sung, Po-Jung, Chang, Shu-Wei, Kao, Kuo-Hsing, Wu, Chien-Ting, Su, Chun-Jung, Cho, Ta-Chun, Hsueh, Fu-Kuo, Lee, Wen-Hsi, Lee, Yao-Jen, Chao, Tien-Sheng
Published in IEEE transactions on electron devices (01.09.2020)
Published in IEEE transactions on electron devices (01.09.2020)
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Subthreshold Swing Saturation of Nanoscale MOSFETs Due to Source-to-Drain Tunneling at Cryogenic Temperatures
Kao, Kuo-Hsing, Wu, Tzung Rang, Chen, Hong-Lin, Lee, Wen-Jay, Chen, Nan-Yow, Ma, William Cheng-Yu, Su, Chun-Jung, Lee, Yao-Jen
Published in IEEE electron device letters (01.09.2020)
Published in IEEE electron device letters (01.09.2020)
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Steep-slope hysteresis-free negative capacitance MoS2 transistors
Si, Mengwei, Su, Chun-Jung, Jiang, Chunsheng, Conrad, Nathan J., Zhou, Hong, Maize, Kerry D., Qiu, Gang, Wu, Chien-Ting, Shakouri, Ali, Alam, Muhammad A., Ye, Peide D.
Published in Nature nanotechnology (18.12.2017)
Published in Nature nanotechnology (18.12.2017)
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Gate-All-Around Junctionless Transistors With Heavily Doped Polysilicon Nanowire Channels
Su, Chun-Jung, Tsai, Tzu-I, Liou, Yu-Ling, Lin, Zer-Ming, Lin, Horng-Chih, Chao, Tien-Sheng
Published in IEEE electron device letters (01.04.2011)
Published in IEEE electron device letters (01.04.2011)
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First Demonstration of Ferroelectric Tunnel Thin-Film Transistor Nonvolatile Memory With Polycrystalline-Silicon Channel and HfZrO } Gate Dielectric
Ma, William Cheng-Yu, Su, Chun-Jung, Kao, Kuo-Hsing, Lee, Yao-Jen, Lin, Ju-Heng, Wu, Pin-Hua, Chang, Jui-Che, Yen, Cheng-Lun, Tseng, Hsin-Chun, Liao, Hsu-Tang, Chou, Yu-Wen, Chiu, Min-Yu, Chen, Yan-Qing
Published in IEEE transactions on electron devices (01.11.2022)
Published in IEEE transactions on electron devices (01.11.2022)
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Impact of Nanosheet Thickness on Performance and Reliability of Polycrystalline-Silicon Thin-Film Transistors With Double-Gate Operation
Ma, William Cheng-Yu, Su, Chun-Jung, Kao, Kuo-Hsing, Guo, Jing-Qiang, Wu, Cheng-Jun, Wu, Po-Ying, Hung, Jia-Yuan
Published in IEEE transactions on nanotechnology (2023)
Published in IEEE transactions on nanotechnology (2023)
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Efficient Erase Operation by GIDL Current for 3D Structure FeFETs With Gate Stack Engineering and Compact Long-Term Retention Model
Mo, Fei, Xiang, Jiawen, Mei, Xiaoran, Sawabe, Yoshiki, Saraya, Takuya, Hiramoto, Toshiro, Su, Chun-Jung, Hu, Vita Pi-Ho, Kobayashi, Masaharu
Published in IEEE journal of the Electron Devices Society (2022)
Published in IEEE journal of the Electron Devices Society (2022)
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Effects of Annealing Temperature on TiN/Hf0.5Zr0.5O2/TiN Ferroelectric Capacitor Prepared by In-Situ Like Consecutive Atomic Layer Deposition
Liang, Yan-Kui, Huang, Yi-Shuo, Peng, Li-Chi, Yang, Tsung-Ying, Young, Bo-Feng, Lu, Chun-Chieh, Yeong, Sai Hooi, Lin, Yu-Ming, Su, Chun-Jung, Chang, Edward-Yi, Lin, Chun-Hsiung
Published in IEEE transactions on nanotechnology (2022)
Published in IEEE transactions on nanotechnology (2022)
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Effective N-methyl-2-pyrrolidone wet cleaning for fabricating high-performance monolayer MoS2 transistors
Chen, Po-Chun, Lin, Chih-Pin, Hong, Chuan-Jie, Yang, Chih-Hao, Lin, Yun-Yan, Li, Ming-Yang, Li, Lain-Jong, Yu, Tung-Yuan, Su, Chun-Jung, Li, Kai-Shin, Zhong, Yuan-Liang, Hou, Tuo-Hung, Lan, Yann-Wen
Published in Nano research (01.02.2019)
Published in Nano research (01.02.2019)
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Monolithic 3D integration of back-end compatible 2D material FET on Si FinFET
Guan, Shi-Xian, Yang, Tilo H., Yang, Chih-Hao, Hong, Chuan-Jie, Liang, Bor-Wei, Simbulan, Kristan Bryan, Chen, Jyun-Hong, Su, Chun-Jung, Li, Kai-Shin, Zhong, Yuan-Liang, Li, Lain-Jong, Lan, Yann-Wen
Published in NPJ 2D materials and applications (07.02.2023)
Published in NPJ 2D materials and applications (07.02.2023)
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Random and Systematic Variation in Nanoscale Hf0.5Zr0.5O2 Ferroelectric FinFETs: Physical Origin and Neuromorphic Circuit Implications
De, Sourav, Baig, Md. Aftab, Qiu, Bo-Han, Müller, Franz, Le, Hoang-Hiep, Lederer, Maximilian, Kämpfe, Thomas, Ali, Tarek, Sung, Po-Jung, Su, Chun-Jung, Lee, Yao-Jen, Lu, Darsen D.
Published in Frontiers in nanotechnology (26.01.2022)
Published in Frontiers in nanotechnology (26.01.2022)
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