RRAM-DNN: An RRAM and Model-Compression Empowered All-Weights-On-Chip DNN Accelerator
Li, Ziyun, Wang, Zhehong, Xu, Li, Dong, Qing, Liu, Bowen, Su, Chin-I, Chu, Wen-Ting, Tsou, George, Chih, Yu-Der, Chang, Tsung-Yung Jonathan, Sylvester, Dennis, Kim, Hun-Seok, Blaauw, David
Published in IEEE journal of solid-state circuits (01.04.2021)
Published in IEEE journal of solid-state circuits (01.04.2021)
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Journal Article
8-b Precision 8-Mb ReRAM Compute-in-Memory Macro Using Direct-Current-Free Time-Domain Readout Scheme for AI Edge Devices
Hung, Je-Min, Wen, Tai-Hao, Huang, Yen-Hsiang, Huang, Sheng-Po, Chang, Fu-Chun, Su, Chin-I, Khwa, Win-San, Lo, Chung-Chuan, Liu, Ren-Shuo, Hsieh, Chih-Cheng, Tang, Kea-Tiong, Chih, Yu-Der, Chang, Tsung-Yung Jonathan, Chang, Meng-Fan
Published in IEEE journal of solid-state circuits (01.01.2023)
Published in IEEE journal of solid-state circuits (01.01.2023)
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Journal Article
Fusion of memristor and digital compute-in-memory processing for energy-efficient edge computing
Wen, Tai-Hao, Hung, Je-Min, Huang, Wei-Hsing, Jhang, Chuan-Jia, Lo, Yun-Chen, Hsu, Hung-Hsi, Ke, Zhao-En, Chen, Yu-Chiao, Chin, Yu-Hsiang, Su, Chin-I, Khwa, Win-San, Lo, Chung-Chuan, Liu, Ren-Shuo, Hsieh, Chih-Cheng, Tang, Kea-Tiong, Ho, Mon-Shu, Chou, Chung-Cheng, Chih, Yu-Der, Chang, Tsung-Yung Jonathan, Chang, Meng-Fan
Published in Science (American Association for the Advancement of Science) (19.04.2024)
Published in Science (American Association for the Advancement of Science) (19.04.2024)
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Journal Article
A 28nm Nonvolatile AI Edge Processor using 4Mb Analog-Based Near-Memory-Compute ReRAM with 27.2 TOPS/W for Tiny AI Edge Devices
Wen, Tai-Hao, Hung, Je-Min, Hsu, Hung-Hsi, Wu, Yuan, Chang, Fu-Chun, Li, Chung-Yuan, Chien, Chih-Han, Su, Chin-I, Khwa, Win-San, Wu, Jui-Jen, Lo, Chung-Chuan, Liu, Ren-Shuo, Hsieh, Chih-Cheng, Tang, Kea-Tiong, Ho, Mon-Shu, Chih, Yu-Der, Chang, Tsung-Yung Jonathan, Chang, Meng-Fan
Published in 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) (11.06.2023)
Published in 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) (11.06.2023)
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Conference Proceeding
A fast readout circuit for an organic vertical nano-junction sensor
Trong-Hieu Tran, Chao, Paul C.-P, Chin-I Su, Hsiao-Wen Zan
Published in 2016 IEEE SENSORS (01.10.2016)
Published in 2016 IEEE SENSORS (01.10.2016)
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Conference Proceeding
An 8-Mb DC-Current-Free Binary-to-8b Precision ReRAM Nonvolatile Computing-in-Memory Macro using Time-Space-Readout with 1286.4-21.6TOPS/W for Edge-AI Devices
Hung, Je-Min, Huang, Yen-Hsiang, Huang, Sheng-Po, Chang, Fu-Chun, Wen, Tai-Hao, Su, Chin-I, Khwa, Win-San, Lo, Chung-Chuan, Liu, Ren-Shuo, Hsieh, Chih-Cheng, Tang, Kea-Tiong, Chih, Yu-Der, Chang, Tsung-Yung Jonathan, Chang, Meng-Fan
Published in 2022 IEEE International Solid- State Circuits Conference (ISSCC) (20.02.2022)
Published in 2022 IEEE International Solid- State Circuits Conference (ISSCC) (20.02.2022)
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Conference Proceeding
A 22nm 96KX144 RRAM Macro with a Self-Tracking Reference and a Low Ripple Charge Pump to Achieve a Configurable Read Window and a Wide Operating Voltage Range
Chou, Chung-Cheng, Lin, Zheng-Jun, Lai, Chien-An, Su, Chin-I, Tseng, Pei-Ling, Chen, Wei-Chi, Tsai, Wu-Chin, Chu, Wen-Ting, Ong, Tong-Chern, Chuang, Harry, Chih, Yu-Der, Chang, Tsung-Yung Jonathan
Published in 2020 IEEE Symposium on VLSI Circuits (01.06.2020)
Published in 2020 IEEE Symposium on VLSI Circuits (01.06.2020)
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Conference Proceeding
An All-Weights-on-Chip DNN Accelerator in 22nm ULL Featuring 24×1 Mb eRRAM
Wang, Zhehong, Li, Ziyun, Xu, Li, Dong, Qing, Su, Chin-I, Chu, Wen-Ting, Tsou, George, Chih, Yu-Der, Chang, Tsung-Yung Jonathan, Sylvester, Dennis, Kim, Hun Seok, Blaauw, David
Published in 2020 IEEE Symposium on VLSI Circuits (01.06.2020)
Published in 2020 IEEE Symposium on VLSI Circuits (01.06.2020)
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Conference Proceeding
Logic Process Compatible 40nm 256K×144 Embedded RRAM with Low Voltage Current Limiter and Ambient Compensation Scheme to Improve the Read Window
Lai, Chien-An, Chou, Chung-Cheng, Weng, Chi-Hsiang, Lin, Zheng-Jun, Tseng, Pei-Ling, Wang, Chien-Fan, Wang, Chih-Chen, Su, Chin-I, Chen, Wei-Chi, Lin, Yu-Cheng, Ong, Tong-Chern, Chang, Chi, Chih, Yu-Der, Chang, Tsung-Yung
Published in 2018 IEEE Asian Solid-State Circuits Conference (A-SSCC) (01.11.2018)
Published in 2018 IEEE Asian Solid-State Circuits Conference (A-SSCC) (01.11.2018)
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Conference Proceeding
16.1 A 22nm 4Mb 8b-Precision ReRAM Computing-in-Memory Macro with 11.91 to 195.7TOPS/W for Tiny AI Edge Devices
Xue, Cheng-Xin, Hung, Je-Min, Kao, Hui-Yao, Huang, Yen-Hsiang, Huang, Sheng-Po, Chang, Fu-Chun, Chen, Peng, Liu, Ta-Wei, Jhang, Chuan-Jia, Su, Chin-I, Khwa, Win-San, Lo, Chung-Chuan, Liu, Ren-Shuo, Hsieh, Chih-Cheng, Tang, Kea-Tiong, Chih, Yu-Der, Chang, Tsung-Yung Jonathan, Chang, Meng-Fan
Published in 2021 IEEE International Solid- State Circuits Conference (ISSCC) (13.02.2021)
Published in 2021 IEEE International Solid- State Circuits Conference (ISSCC) (13.02.2021)
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Conference Proceeding