Adaptive Multi-Pulse Program Scheme Based on Tunneling Speed Classification for Next Generation Multi-Bit/Cell NAND FLASH
Cho, Yong Sung, Park, Il Han, Yoon, Sang Yong, Lee, Nam Hee, Joo, Sang Hyun, Song, Ki-Whan, Choi, Kihwan, Han, Jin-Man, Kyung, Kye Hyun, Jun, Young-Hyun
Published in IEEE journal of solid-state circuits (01.04.2013)
Published in IEEE journal of solid-state circuits (01.04.2013)
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A 31 ns Random Cycle VCAT-Based 4F ^ DRAM With Manufacturability and Enhanced Cell Efficiency
Song, Ki-Whan, Kim, Jin-Young, Yoon, Jae-Man, Kim, Sua, Kim, Huijung, Chung, Hyun-Woo, Kim, Hyungi, Kim, Kanguk, Park, Hwan-Wook, Kang, Hyun Chul, Tak, Nam-Kyun, Park, Dukha, Kim, Woo-Seop, Lee, Yeong-Taek, Oh, Yong Chul, Jin, Gyo-Young, Yoo, Jeihwan, Park, Donggun, Oh, Kyungseok, Kim, Changhyun, Jun, Young-Hyun
Published in IEEE journal of solid-state circuits (01.04.2010)
Published in IEEE journal of solid-state circuits (01.04.2010)
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SET/CMOS hybrid process and multiband filtering circuits
SONG, Ki-Whan, YONG KYU LEE, JAE SUNG SIM, JEOUNG, Hoon, JONG DUK LEE, PARK, Byung-Gook, YOU SEUNG JIN, KIM, Young-Wug
Published in IEEE transactions on electron devices (01.08.2005)
Published in IEEE transactions on electron devices (01.08.2005)
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A flash memory controller for 15μs ultra-low-latency SSD using high-speed 3D NAND flash with 3μs read time
Cheong, Wooseong, Yu, Geunyeong, Kim, Jaehong, Park, Jaechun, Song, Ki-Whan, Park, Ki-Tae, Cho, Sangyeun, Oh, Hwaseok, Lee, Daniel D.G., Choi, Jin-Hyeok, Jeong, Jaeheon, Yoon, Chanho, Woo, Seonghoon, Han, Kyuwook, Kim, Daehyun, Lee, Chulseung, Choi, Youra, Kim, Shine, Kang, Dongku
Published in 2018 IEEE International Solid - State Circuits Conference - (ISSCC) (01.02.2018)
Published in 2018 IEEE International Solid - State Circuits Conference - (ISSCC) (01.02.2018)
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Design and optimization of two-bit double-gate nonvolatile memory cell for highly reliable operation
Cho, Seongjae, Park, Il Han, Kim, Tae Hun, Sim, Jae Sung, Song, Ki-Whan, Lee, Jong Duk, Shin, Hyungcheol, Park, Byung-Gook
Published in IEEE transactions on nanotechnology (01.05.2006)
Published in IEEE transactions on nanotechnology (01.05.2006)
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Novel Electrical Detection Method for Random Defects on Peripheral Circuits in NAND Flash Memory
Nam, Bu-Il, Choi, Youngha, Hong, Sungki, Dong, Ki-Young, Jung, Wontaeck, Park, Sang-Won, Lee, Soon-Yong, Jung, Dooyeun, Kim, Byoung-Hee, Kim, Eunkyoung, Song, Ki-Whan, Song, Jai Hyuk, Young Choi, Woo
Published in 2022 IEEE International Reliability Physics Symposium (IRPS) (01.03.2022)
Published in 2022 IEEE International Reliability Physics Symposium (IRPS) (01.03.2022)
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Twin SONOS memory with 30-nm storage nodes under a merged gate fabricated with inverted sidewall and damascene process
Yong Kyu Lee, Ki Whan Song, Jae Woong Hyun, Jong Duk Lee, Byung-Gook Park, Sung Taeg Kang, Jeong Dong Choe, Sang Yeon Han, Jeong Nam Han, Sung Woo Lee, Kwon, O.I., Chung, C., Donggun Park, Kinam Kim
Published in IEEE electron device letters (01.05.2004)
Published in IEEE electron device letters (01.05.2004)
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Field-induced interband tunneling effect transistor (FITET) with negative-differential transconductance and negative-differential conductance
Kim, K.R., Kim, H.H., Song, K.W., Huh, J.I., Lee, J.D., Park, B.G.
Published in IEEE transactions on nanotechnology (01.05.2005)
Published in IEEE transactions on nanotechnology (01.05.2005)
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Silicon-based field-induced band-to-band tunnelling effect transistor
Kim, K.R., Kim, D.H., Song, K.-W., Baek, G., Kim, H.H., Huh, J.I., Lee, J.D., Park, B.-G.
Published in IEEE electron device letters (01.06.2004)
Published in IEEE electron device letters (01.06.2004)
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Analytical modeling of field-induced interband tunneling-effect transistors and its application
Song, Seung-Hwan, Kim, Kyung Rok, Kang, Sangwoo, Kim, Jin Ho, Huh, Jung Im, Kang, Kwon Chil, Song, Ki-Whan, Lee, Jong Duk, Park, Byung-Gook
Published in IEEE transactions on nanotechnology (01.05.2006)
Published in IEEE transactions on nanotechnology (01.05.2006)
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Complementary Self-Biased Logics Based on Single-Electron Transistor (SET)/CMOS Hybrid Process
Song, Ki-Whan, Lee, Yong Kyu, Sim, Jae Sung, Kim, Kyung Rok, Lee, Jong Duk, Park, Byung-Gook, You, Young Sub, Park, Joo-On, Jin, You Seung, Kim, Young-Wug
Published in Japanese Journal of Applied Physics (01.04.2005)
Published in Japanese Journal of Applied Physics (01.04.2005)
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A 58nm 1.8V 1Gb PRAM with 6.4MB/s program BW
Hoeju Chung, Byung Hoon Jeong, ByungJun Min, Youngdon Choi, Beak-Hyung Cho, Junho Shin, Jinyoung Kim, Jung Sunwoo, Joon-min Park, Qi Wang, Yong-jun Lee, Sooho Cha, Dukmin Kwon, Sangtae Kim, Sunghoon Kim, Yoohwan Rho, Mu-Hui Park, Jaewhan Kim, Ickhyun Song, Sunghyun Jun, Jaewook Lee, KiSeung Kim, Ki-won Lim, Won-ryul Chung, ChangHan Choi, HoGeun Cho, Inchul Shin, Woochul Jun, Seokwon Hwang, Ki-Whan Song, KwangJin Lee, Sang-whan Chang, Woo-Yeong Cho, Jei-Hwan Yoo, Young-Hyun Jun
Published in 2011 IEEE International Solid-State Circuits Conference (01.02.2011)
Published in 2011 IEEE International Solid-State Circuits Conference (01.02.2011)
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Analytical Modeling of Realistic Single-Electron Transistors Based on Metal-Oxide-Semiconductor Structure with a Unique Distribution Function in the Coulomb-Blockade Oscillation Region
Kim, Kyung Rok, Song, Ki-Whan, Kim, Dae Hwan, Baek, Gwanghyeon, Kim, Hyun Ho, Huh, Jung Im, Lee, Jong Duk, Park, Byung-Gook
Published in Japanese Journal of Applied Physics (01.04.2004)
Published in Japanese Journal of Applied Physics (01.04.2004)
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A New Capacitorless 1T DRAM Cell: Surrounding Gate MOSFET With Vertical Channel (SGVC Cell)
JEONG, Hoon, SONG, Ki-Whan, JONG DUK LEE, PARK, Byung-Gook, IL HAN PARK, KIM, Tae-Hun, YEUN SEUNG LEE, KIM, Seong-Goo, JUN SEO, CHO, Kyoungyong, LEE, Kangyoon, SHIN, Hyungcheol
Published in IEEE transactions on nanotechnology (01.05.2007)
Published in IEEE transactions on nanotechnology (01.05.2007)
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A 2.5-V 2.0-Gbyte/s 288-Mb packet-based DRAM with enhanced cell efficiency and noise immunity
Kyung, Kye-Hyun, Lee, Hi-Choon, Song, Ki-Whan, Song, Ho-Sung, Jung, Keewook, Moon, Joon-Seo, Kim, Byoung-Sul, Cho, Sung-Burn, Kim, Changhyun, Cho, Soo-In
Published in IEEE journal of solid-state circuits (01.05.2001)
Published in IEEE journal of solid-state circuits (01.05.2001)
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A 64Gb 533Mb/s DDR interface MLC NAND Flash in sub-20nm technology
Daeyeal Lee, Ik Joon Chang, Sang-Yong Yoon, Joonsuc Jang, Dong-Su Jang, Wook-Ghee Hahn, Jong-Yeol Park, Doo-Gon Kim, Chiweon Yoon, Bong-Soon Lim, Byung-Jun Min, Sung-Won Yun, Ji-Sang Lee, Il-Han Park, Kyung-Ryun Kim, Jeong-Yun Yun, Youse Kim, Yong-Sung Cho, Kyung-Min Kang, Sang-Hyun Joo, Jin-Young Chun, Jung-No Im, Seunghyuk Kwon, Seokjun Ham, Ansoo Park, Jae-Duk Yu, Nam-Hee Lee, Tae-Sung Lee, Moosung Kim, Hoosung Kim, Ki-Whan Song, Byung-Gil Jeon, Kihwan Choi, Jin-Man Han, Kye Hyun Kyung, Young-Ho Lim, Young-Hyun Jun
Published in 2012 IEEE International Solid-State Circuits Conference (01.02.2012)
Published in 2012 IEEE International Solid-State Circuits Conference (01.02.2012)
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Machine Learning for Product Engineering in NAND Flash Memory
Kim, Jongmin, Kim, Earl, Choe, Jeongin, Song, Ki-Whan, Kim, Eunkyoung, Song, Jai Hyuk
Published in 2022 International Conference on Electronics, Information, and Communication (ICEIC) (06.02.2022)
Published in 2022 International Conference on Electronics, Information, and Communication (ICEIC) (06.02.2022)
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