SEMICONDUCTOR CHIP WITH REDUNDANT THRU-SILICON-VIAS
BLACK BRYAN, SU MICHAEL Z, PREJEAN SETH, REFAI AHMED GAMAL, SIEGEL JOE
Year of Publication 03.09.2013
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Year of Publication 03.09.2013
Patent
An Overview of the Development of a GPU with Integrated HBM on Silicon Interposer
Chang-Chi Lee, Hung, C. P., Calvin Cheung, Ping-Feng Yang, Chin-Li Kao, Dao-Long Chen, Meng-Kai Shih, Chien-Lin Chang Chien, Yu-Hsiang Hsiao, Li-Chieh Chen, Su, Michael, Alfano, Michael, Siegel, Joe, Din, Julius, Black, Bryan
Published in 2016 IEEE 66th Electronic Components and Technology Conference (ECTC) (01.05.2016)
Published in 2016 IEEE 66th Electronic Components and Technology Conference (ECTC) (01.05.2016)
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Conference Proceeding
SEMICONDUCTOR CHIP WITH REDUNDANT THRU-SILICON-VIAS
REFAI-AHMED, GAMAL, SIEGEL, JOE, BLACK, BRYAN, PREJEAN, SETH, SU, MICHAEL Z
Year of Publication 02.02.2023
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Year of Publication 02.02.2023
Patent
Semiconductor chip with redundant thru-silicon-vias
Su, Michael Z, Prejean, Seth, Refai-Ahmed, Gamal, Siegel, Joe, Black, Bryan
Year of Publication 11.10.2022
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Year of Publication 11.10.2022
Patent
SEMICONDUCTOR CHIP WITH REDUNDANT THRU-SILICON-VIAS
BLACK, Bryan, SIEGEL, Joe, REFAI-AHMED, Gamal, PREJEAN, Seth, SU, Michael, Z
Year of Publication 25.11.2020
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Year of Publication 25.11.2020
Patent
Interposer with identification system
Su, Michael Z, Alfano, Michael, Din, Julius, Siegel, Joe, Black, Bryan
Year of Publication 14.05.2019
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Year of Publication 14.05.2019
Patent
SEMICONDUCTOR CHIP WITH REDUNDANT THRU-SILICON-VIAS
Su Michael Z, Black Bryan, Prejean Seth, Refai-Ahmed Gamal, Siegel Joe
Year of Publication 15.12.2016
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Year of Publication 15.12.2016
Patent
Semiconductor chip with redundant thru-silicon-vias
Su Michael Z, Black Bryan, Prejean Seth, Refai-Ahmed Gamal, Siegel Joe
Year of Publication 06.09.2016
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Year of Publication 06.09.2016
Patent
UNIVERSAL INTERCONNECT FOOTPRINT FOR BONDING SEMICONDUCTOR SUBSTRATES
MCLELLAN, NEIL, SIEGEL, JOE, SU, MICHAEL, BLACK, BRYAN, ALFANO, MICHAEL
Year of Publication 03.10.2013
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Year of Publication 03.10.2013
Patent
DIE STACKING WITH COUPLED ELECTRICAL INTERCONNECTS TO ALIGN PROXIMITY INTERCONNECTS
MCLELLAN, NEIL, SIEGEL, JOE, SU, MICHAEL, BLACK, BRYAN, ALFANO, MICHAEL
Year of Publication 03.10.2013
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Year of Publication 03.10.2013
Patent
SEMICONDUCTOR CHIP WITH REDUNDANT THRU-SILICON-VIAS
REFAI-AHMED, GAMAL, SIEGEL, JOE, SU, MICHAEL, Z, BLACK, BRYAN, PREJEAN, SETH
Year of Publication 17.07.2013
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Year of Publication 17.07.2013
Patent
SEMICONDUCTOR CHIP WITH REDUNDANT THRU-SILICON-VIAS
BLACK BRYAN, SU MICHAEL Z, PREJEAN SETH, SIEGEL JOE, REFAI-AHMED GAMAL
Year of Publication 15.03.2012
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Year of Publication 15.03.2012
Patent
SEMICONDUCTOR CHIP WITH REDUNDANT THRU-SILICON-VIAS
REFAI-AHMED, GAMAL, SIEGEL, JOE, SU, MICHAEL, Z, BLACK, BRYAN, PREJEAN, SETH
Year of Publication 15.03.2012
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Year of Publication 15.03.2012
Patent