Chip Demonstration of a High-Density (43Gb) and High-Search-Bandwidth (300Gb/s) 3D NAND Based In-Memory Search Accelerator for Ternary Content Addressable Memory (TCAM) and Proximity Search of Hamming Distance
Hsieh, Chih-Chang, Lue, Hang-Ting, Li, Yung-Chun, Hung, Shuo-Nan, Hung, Chun-Hsiung, Wang, Keh-Chung, Lu, Chih-Yuan
Published in 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) (11.06.2023)
Published in 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) (11.06.2023)
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Conference Proceeding
Layer-Aware Program-and-Read Schemes for 3D Stackable Vertical-Gate BE-SONOS NAND Flash Against Cross-Layer Process Variations
Hung, Chun-Hsiung, Chang, Meng-Fan, Yang, Yih-Shan, Kuo, Yao-Jen, Lai, Tzu-Neng, Shen, Shin-Jang, Hsu, Jo-Yu, Hung, Shuo-Nan, Lue, Hang-Ting, Shih, Yen-Hao, Huang, Shih-Lin, Chen, Ti-Wen, Chen, Tzung Shen, Chen, Chung Kuang, Hung, Chi-Yu, Lu, Chih-Yuan
Published in IEEE journal of solid-state circuits (01.06.2015)
Published in IEEE journal of solid-state circuits (01.06.2015)
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Journal Article
Study of the interference and disturb mechanisms of split-page 3D vertical gate (VG) NAND flash and optimized programming algorithms for multi-level cell (MLC) storage
Chih-Chang Hsieh, Hang-Ting Lue, Yung Chun Li, Kuo-Ping Chang, Hsing Chen Lu, Hsiang-Pang Li, Wei-Chen Chen, Yi-Hsuan Hsiao, Shuo-Nan Hung, Ti-Wen Chen, Yen-Hao Shih, Chih-Yuan Lu
Published in 2013 Symposium on VLSI Technology (01.06.2013)
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Published in 2013 Symposium on VLSI Technology (01.06.2013)
Conference Proceeding
3D stackable vertical-gate BE-SONOS NAND flash with layer-aware program-and-read schemes and wave-propagation fail-bit-detection against cross-layer process variations
Chun-Hsiung Hung, Yih-Shan Yang, Yao-Jen Kuo, Tzu-Neng Lai, Shin-Jang Shen, Jo-Yu Hsu, Shuo-Nan Hung, Hang-Ting Lue, Meng-Fan Chang, Yen-Hao Shih, Shih-Lin Huang, Ti-Wen Chen, Tzung Shen Chen, Chung Kuang Chen, Chi-Yu Hung, Chih-Yuan Lu
Published in 2013 Symposium on VLSI Technology (01.06.2013)
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Published in 2013 Symposium on VLSI Technology (01.06.2013)
Conference Proceeding
Design innovations to optimize the 3D stackable vertical gate (VG) NAND flash
Chun-Hsiung Hung, Hang-Ting Lue, Shuo-Nan Hung, Chih-Chang Hsieh, Kuo-Pin Chang, Ti-Wen Chen, Shih-Lin Huang, Tzung Shen Chen, Chih-Shen Chang, Wen-Wei Yeh, Yi-Hsuan Hsiao, Chieh-Fang Chen, Shih-Cheng Huang, Yan-Ru Chen, Guan-Ru Lee, Chih-Wei Hu, Shih-Hung Chen, Chia-Jung Chiu, Yen-Hao Shih, Chih-Yuan Lu
Published in 2012 International Electron Devices Meeting (01.12.2012)
Published in 2012 International Electron Devices Meeting (01.12.2012)
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Conference Proceeding