Advanced device performance impact by wafer level 3D stacked architecture
Liu, J. C., Huang, K. C., Chu, Y. H., Hung, J. M., Change, C. C., Wei, Y. L., Lin, J. S., Kao, M. F., Chen, P. T., Huang, S. Y., Lin, H. C., Wang, W. D., Chou, Peter, Lu, C. F., Tu, Y. L., Shiu, F. J., Huang, C. F., Lin, C. H., Lu, T. H., Yaung, D. N.
Published in 2015 IEEE International Electron Devices Meeting (IEDM) (01.12.2015)
Published in 2015 IEEE International Electron Devices Meeting (IEDM) (01.12.2015)
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Journal Article
Advanced 1.1um pixel CMOS image sensor with 3D stacked architecture
Liu, J. C., Yaung, D. N., Sze, J. J., Wang, C. C., Hung, Gene, Wang, C. J., Hsu, T. H., Lin, R. J., Wang, T. J., Wang, W. D., Cheng, H. Y., Lin, J. S., Tsai, S. J., Tsai, S. T., Chuang, C. C., Hsu, W. I., Chen, S. Y., Huang, K. C., Wu, W. H., Takahashi, S., Tu, Y. L., Tsai, C. S., Lee, R. L., Mo, W. P., Shiu, F. J., Chao, Y. P., Wuu, S. G.
Published in 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers (01.06.2014)
Published in 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers (01.06.2014)
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Ultra-low-power switching and complementary resistive switching RRAM by single-stack metal-oxide dielectric
Tsai, C. Y., Huang, K. C., Ting, Y. W., Liao, Y. W., Chang, C. Y., Yang, J. J., Lai, P. Y., Chen, H. W., Tang, B. T., Chang, Y. W., Hsieh, C. P., Huang, W. C., Lin, Y. H., Tu, K. C., Hsu, C. Y., Liu, S. C., Chen, J. J., Chu, W. T., Tsai, C. Y., Shiu, F. J., Wang, C. J., Tsai, C. S., Ong, T. C., Hwang, H. Y., Chang, C., Tran, L. C.
Published in 2013 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) (01.04.2013)
Published in 2013 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) (01.04.2013)
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