Session 30 Overview: Non-Volatile Memories
Taito, Yasuhiko, Moschiano, Violante, Shiratake, Shinichiro
Published in 2021 IEEE International Solid-State Circuits Conference (ISSCC) (13.02.2021)
Published in 2021 IEEE International Solid-State Circuits Conference (ISSCC) (13.02.2021)
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Conference Proceeding
Session 24 Overview: Advanced Embedded Memories
Karl, Eric, Shiratake, Shinichiro, Chang, Jonathan
Published in 2021 IEEE International Solid-State Circuits Conference (ISSCC) (13.02.2021)
Published in 2021 IEEE International Solid-State Circuits Conference (ISSCC) (13.02.2021)
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Conference Proceeding
MEMORY DEVICE
SAITO SAKATOSHI, SHIRATAKE SHINICHIRO, INOUE HIROFUMI, NARUGE KIYOMI, OKAJIMA MUTSUMI
Year of Publication 25.03.2021
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Year of Publication 25.03.2021
Patent
SE1: What Technologies Will Shape the Future of Computing?
Mair, Hugh, Shiratake, Shinichiro, Karl, Eric, Burd, Thomas, Chang, Jonathan, Marr, Debbie, Naffziger, Samuel, Corporaal, Henk, Takeuchi, Ken, Shanbhag, Naresh
Published in 2021 IEEE International Solid-State Circuits Conference (ISSCC) (13.02.2021)
Published in 2021 IEEE International Solid-State Circuits Conference (ISSCC) (13.02.2021)
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Conference Proceeding
F1: Intelligent energy-efficient systems at the edge of IoT
De, Vivek, Sylvester, Dennis, Myers, James, Deguchi, Jun, Shiratake, Shinichiro, Verbauwhede, Ingrid
Published in 2018 IEEE International Solid-State Circuits Conference - (ISSCC) (01.02.2018)
Published in 2018 IEEE International Solid-State Circuits Conference - (ISSCC) (01.02.2018)
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Conference Proceeding
F3: Beyond the horizon of conventional computing: From deep learning to neuromorphic systems
Chang, Meng-Fan, Deguchi, Jun, De, Vivek, Motomura, Masato, Shiratake, Shinichiro, Verhelst, Marian
Published in 2017 IEEE International Solid-State Circuits Conference (ISSCC) (01.02.2017)
Published in 2017 IEEE International Solid-State Circuits Conference (ISSCC) (01.02.2017)
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Conference Proceeding
A 64-Mb Chain FeRAM With Quad BL Architecture and 200 MB/s Burst Mode
Hoya, Katsuhiko, Takashima, D, Shiratake, S, Ogiwara, R, Miyakawa, T, Shiga, H, Doumae, S M, Ohtsuki, S, Kumura, Y, Shuto, S, Ozaki, T, Yamakawa, K, Kunishima, I, Nitayama, A, Fujii, S
Published in IEEE transactions on very large scale integration (VLSI) systems (01.12.2010)
Published in IEEE transactions on very large scale integration (VLSI) systems (01.12.2010)
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Journal Article
A 63-mW H.264/MPEG-4 audio/visual codec LSI with module-wise dynamic Voltage/frequency scaling
Fujiyoshi, T., Shiratake, S., Nomura, S., Nishikawa, T., Kitasho, Y., Arakida, H., Okuda, Y., Tsuboi, Y., Hamada, M., Hara, H., Fujita, T., Hatori, F., Shimazawa, T., Yahagi, K., Takeda, H., Murakata, M., Minami, F., Kawabe, N., Kitahara, T., Seta, K., Takahashi, M., Oowaki, Y., Furuyama, T.
Published in IEEE journal of solid-state circuits (01.01.2006)
Published in IEEE journal of solid-state circuits (01.01.2006)
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Journal Article
Conference Proceeding