A 16Gb 27Gb/s/pin T-coil based GDDR6 DRAM with Merged-MUX TX, Optimized WCK Operation, and Alternative-Data-Bus
Lee, Daewoong, Kwon, Hye-Jung, Kwon, Daehyun, Baek, Jaehyeok, Cho, Chulhee, Kim, Sanghoon, An, Donggun, Chang, Chulsoon, Lim, Unhak, Im, Jiyeon, Sung, Wonju, Kim, Hye-Ran, Park, Sun-Young, Kim, HyoungJoo, Seol, Hoseok, Kim, Juhwan, Shin, Junabum, Kang, Kil-Youna, Kim, Yona-Hun, Kim, Sooyoung, Park, Wansoo, Kim, Seok-Jung, Lee, Chanyong, Lee, Seungseob, Park, TaeHoon, Oh, ChiSung, Ban, Hyodong, Ko, Hyungjong, Song, Hoyoung, Oh, Tae-Young, Hwang, SangJoon, Oh, Kyung Suk, Choi, JungHwan, Lee, Jooyoung
Published in 2022 IEEE International Solid- State Circuits Conference (ISSCC) (20.02.2022)
Published in 2022 IEEE International Solid- State Circuits Conference (ISSCC) (20.02.2022)
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