Analog building block design in 14nm FinFET using inversion coefficient
Wang, A., Dhawan, V., Shi, C.-J R.
Published in 2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) (01.10.2014)
Published in 2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) (01.10.2014)
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Conference Proceeding
On symbolic model order reduction
Guoyong Shi, Bo Hu, Shi, C.-J.R.
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.07.2006)
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.07.2006)
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Journal Article
Fast-yet-accurate PVT simulation by combined direct and iterative methods
Hu, Bo, Shi, C.-J. R.
Published in International Conference on Computer Aided Design: Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design; 06-10 Nov. 2005 (31.05.2005)
Published in International Conference on Computer Aided Design: Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design; 06-10 Nov. 2005 (31.05.2005)
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Conference Proceeding
Low-power LDPC decoding based on iteration prediction
Xinmiao Zhang, Fang Cai, Shi, C. J. R.
Published in 2012 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2012)
Published in 2012 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2012)
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Conference Proceeding
Mixed-signal system-on-chip verification using a recursively-verifying-modeling (RVM) methodology
Shi, C.-J R
Published in 2010 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2010)
Published in 2010 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2010)
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Conference Proceeding
IPRAIL—intellectual property reuse-based analog IC layout automation
Jangkrajarng, Nuttorn, Bhattacharya, Sambuddha, Hartono, Roy, Shi, C.-J.Richard
Published in Integration (Amsterdam) (01.11.2003)
Published in Integration (Amsterdam) (01.11.2003)
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Journal Article
CASCADE: A Standard Supercell Design Methodology With Congestion-Driven Placement for Three-Dimensional Interconnect-Heavy Very Large-Scale Integrated Circuits
Lili Zhou, Wakayama, C., Shi, C.-J.R.
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.07.2007)
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.07.2007)
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Journal Article