A 40.96-GOPS 196.8-mW Digital Logic Accelerator Used in DNN for Underwater Object Recognition
Wang, Chua-Chin, Sangalang, Ralph Gerard B., Kuo, Chien-Ping, Wu, Hsin-Che, Hsu, Yi, Hsiao, Shen-Fu, Yeh, Chia-Hung
Published in IEEE transactions on circuits and systems. I, Regular papers (01.12.2022)
Published in IEEE transactions on circuits and systems. I, Regular papers (01.12.2022)
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Journal Article
Hierarchical Multipartite Function Evaluation
Hsiao, Shen-Fu, Wen, Chia-Sheng, Chen, Yi-Hau, Huang, Kuei-Chun
Published in IEEE transactions on computers (01.01.2017)
Published in IEEE transactions on computers (01.01.2017)
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Journal Article
Design of a Sparsity-Aware Reconfigurable Deep Learning Accelerator Supporting Various Types of Operations
Hsiao, Shen-Fu, Chen, Kun-Chih, Lin, Chih-Chien, Chang, Hsuan-Jui, Tsai, Bo-Ching
Published in IEEE journal on emerging and selected topics in circuits and systems (01.09.2020)
Published in IEEE journal on emerging and selected topics in circuits and systems (01.09.2020)
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Journal Article
Optimization of Lookup Table Size in Table-Bound Design of Function Computation
Shen-Fu Hsiao, Kun-Chih Chen, Yi-Hau Chen
Published in 2018 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2018)
Published in 2018 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2018)
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Conference Proceeding
Design of Hardware Function Evaluators Using Low-Overhead Nonuniform Segmentation With Address Remapping
HSIAO, Shen-Fu, KO, Hou-Jen, TSENG, Yu-Ling, HUANG, Wen-Liang, LIN, Shin-Hung, WEN, Chia-Sheng
Published in IEEE transactions on very large scale integration (VLSI) systems (01.05.2013)
Published in IEEE transactions on very large scale integration (VLSI) systems (01.05.2013)
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Journal Article
Design of low-leakage multi-port SRAM for register file in graphics processing unit
Shen-Fu Hsiao, Pu-Cheng Wu
Published in 2014 IEEE International Symposium on Circuits and Systems (ISCAS) (01.06.2014)
Published in 2014 IEEE International Symposium on Circuits and Systems (ISCAS) (01.06.2014)
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Conference Proceeding
Para-CORDIC: parallel CORDIC rotation algorithm
Juang, Tso-Bing, Hsiao, Shen-Fu, Tsai, Ming-Yu
Published in IEEE transactions on circuits and systems. I, Regular papers (01.08.2004)
Published in IEEE transactions on circuits and systems. I, Regular papers (01.08.2004)
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Journal Article
Low-error carry-free fixed-width multipliers with low-cost compensation circuits
Juang, T.-B., Shen-Fu Hsiao
Published in IEEE transactions on circuits and systems. II, Express briefs (01.06.2005)
Published in IEEE transactions on circuits and systems. II, Express briefs (01.06.2005)
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Journal Article
Neural Network Acceleration Using Digit-Plane Computation with Early Termination
Hsiao, Shen-Fu, Kuo, Hou-Chun, Kuo, Yu, Chen, Kun-Chih
Published in 2024 IEEE International Symposium on Circuits and Systems (ISCAS) (19.05.2024)
Published in 2024 IEEE International Symposium on Circuits and Systems (ISCAS) (19.05.2024)
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Conference Proceeding
Hardware Accelerator for MobileViT Vision Transformer with Reconfigurable Computation
Hsiao, Shen-Fu, Chao, Tzu-Hsien, Yuan, Yen-Che, Chen, Kun-Chih
Published in 2024 IEEE International Symposium on Circuits and Systems (ISCAS) (19.05.2024)
Published in 2024 IEEE International Symposium on Circuits and Systems (ISCAS) (19.05.2024)
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Conference Proceeding
Low latency design of Depth-Image-Based Rendering using hybrid warping and hole-filling
Shen-Fu Hsiao, Jin-Wen Cheng, Wen-Ling Wang, Guan-Fu Yeh
Published in 2012 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2012)
Published in 2012 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2012)
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Conference Proceeding
Designs of angle-rotation in digital frequency synthesizer/mixer using multi-stage architectures
Shen-Fu Hsiao, Cheng-Han Lee, Yen-Chun Cheng, Lee, A.
Published in 2011 Conference Record of the Forty Fifth Asilomar Conference on Signals, Systems and Computers (ASILOMAR) (01.11.2011)
Published in 2011 Conference Record of the Forty Fifth Asilomar Conference on Signals, Systems and Computers (ASILOMAR) (01.11.2011)
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Conference Proceeding
A Power Effective DLA for PBs in Opto-Electrical Neural Network Architecture
Sangalang, Ralph Gerard B., Luo, Shih-Heng, Wu, Hsin-Che, He, Bao-Qi, Hsiao, Shen-Fu, Wang, Chua-Chin, Jou, Chewnpu, Hsia, Harry, Yu, Douglas C.-H.
Published in 2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) (11.11.2022)
Published in 2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) (11.11.2022)
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Conference Proceeding