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Published in Applied sciences (01.12.2022)
Published in Applied sciences (01.12.2022)
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Published in 2021 58th ACM/IEEE Design Automation Conference (DAC) (05.12.2021)
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Published in 2021 Symposium on VLSI Circuits (13.06.2021)
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Conference Proceeding
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Published in arXiv.org (02.12.2021)
Published in arXiv.org (02.12.2021)
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Paper
Journal Article
A 7nm 0.46pJ/bit 20Gbps with BER 1E-25 Die-to-Die Link Using Minimum Intrinsic Auto Alignment and Noise-Immunity Encode
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Published in 2021 Symposium on VLSI Technology (13.06.2021)
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Published in 2021 Symposium on VLSI Technology (13.06.2021)
Conference Proceeding
MACHINE-LEARNING BASED ARCHITECTURAL DESIGN PLACEMENT FOR ELECTRONIC CIRCUITRY OF AN ELECTRONIC DEVICE
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Year of Publication 18.05.2023
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Year of Publication 18.05.2023
Patent
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Year of Publication 21.12.2023
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Year of Publication 21.12.2023
Patent
A computer system, method and computer network for architectural design placement
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Year of Publication 16.06.2023
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Year of Publication 16.06.2023
Patent
A METHOD FOR ANALOG CIRCUIT SIZING AND APPARATUS
CHIANG, CHEN-FENG, WANG, CHUNG-AN, TSAI, FENG-MING, YANG, KAI-EN, SHEN, HUNG-HAO, LAI, CHIN-TANG, TSAI, CHIA-YU, TING, YIJU, YEH, CHIA-SHUN
Year of Publication 21.05.2022
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Year of Publication 21.05.2022
Patent
A method for analog circuit sizing and apparatus
CHIANG, CHEN-FENG, WANG, CHUNG-AN, TSAI, FENG-MING, YANG, KAI-EN, SHEN, HUNG-HAO, TING, YI-JU, LAI, CHIN-TANG, TSAI, CHIA-YU, YEH, CHIA-SHUN
Year of Publication 16.05.2022
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Year of Publication 16.05.2022
Patent