Data Retention Characteristics of Nitride-Based Charge Trap Memory Devices with High-k Dielectrics and High-Work-Function Metal Gates for Multi-Gigabit Flash Memory
Lee, Jang-Sik, Kang, Chang-Seok, Shin, Yoo-Cheol, Lee, Chang-Hyun, Park, Ki-Tae, Sel, Jong-Sun, Kim, Viena, Choe, Byeong-In, Sim, Jae-Sung, Choi, Jungdal, Kim, Kinam
Published in Japanese Journal of Applied Physics (01.04.2006)
Published in Japanese Journal of Applied Physics (01.04.2006)
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Journal Article
CHARGE TRAP FLASH MEMORY DEVICE DIMINISHING ERASE STRESS AND PROGRAM AND ERASE METHOD THEREOF
SIM, JAE SUNG, CHOI, KI HWAN, MOON, SEUNG HYUN, SHIN, YOO CHEOL, SEL, JONG SUN, YUN, SUNG WON
Year of Publication 24.07.2009
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Year of Publication 24.07.2009
Patent
Effect of low-k dielectric material on 63nm MLC (multi-level cell) NAND flash cell arrays
Mincheol Park, Jung-Dal Choi, Sung-Hoi Hur, Jong-Ho Park, Joon-Hee Lee, Jin-Taek Park, Jong-Sun Sel, Jong-Won Kim, Sang-Bin Song, Jung-Young Lee, Ji-Hwon Lee, Suk-Joon Son, Yong-Seok Kim, Soo-Jin Chai, Kyeong-Tae Kim, Kinam Kim
Published in IEEE VLSI-TSA International Symposium on VLSI Technology, 2005. (VLSI-TSA-Tech) (2005)
Published in IEEE VLSI-TSA International Symposium on VLSI Technology, 2005. (VLSI-TSA-Tech) (2005)
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Conference Proceeding
Block-to-block isolation and deep contact using pillars in a memory array
Gowda, Srivardhan, Parat, Krishna, Cleereman, Brian J, Thimmegowda, Deepak, Liu, Liu, Sel, Jong Sun, Lin, Jui-Yen, Zhou, Baosuo
Year of Publication 15.10.2024
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Year of Publication 15.10.2024
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METHOD FOR PILLAR BENDING IMPROVEMENT BY CUT TIERS PATTERN IMPLEMENTATION
SEL, Jong Sun, XING, Yao, CHANDOLU, Anil, ZHU, Wenwu, CHEN, Long, KOH, Hoon
Year of Publication 26.10.2023
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Year of Publication 26.10.2023
Patent
BLOCK-TO-BLOCK ISOLATION AND DEEP CONTACT USING PILLARS IN MEMORY ARRAY
LIU, Liu, SEL, Jong Sun, THIMMEGOWDA, Deepak, GOWDA, Srivardhan, CLEEREMAN, Brian J, PARAT, Krishna, LIN, Jui-Yen, ZHOU, Baosuo
Year of Publication 11.10.2023
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Year of Publication 11.10.2023
Patent
ADDITIONAL SILICIDE LAYER ON TOP OF STAIRCASE FOR 3D NAND WL CONTACT CONNECTION
DING, Junchao, LIU, Yingming, LIU, Liu, SEL, Jong Sun, LIN, Xi, MA, Yixin, LEE, Jinwoo
Year of Publication 04.05.2023
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Year of Publication 04.05.2023
Patent
BLOCK-TO-BLOCK ISOLATION AND DEEP CONTACT USING PILLARS IN A MEMORY ARRAY
LIU, Liu, SEL, Jong Sun, THIMMEGOWDA, Deepak, GOWDA, Srivardhan, CLEEREMAN, Brian J, PARAT, Krishna, LIN, Jui-Yen, ZHOU, Baosuo
Year of Publication 02.02.2023
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Year of Publication 02.02.2023
Patent
BLOCK-TO-BLOCK ISOLATION AND DEEP CONTACT USING PILLARS IN MEMORY ARRAY
LIU, Liu, SEL, Jong Sun, THIMMEGOWDA, Deepak, GOWDA, Srivardhan, CLEEREMAN, Brian J, PARAT, Krishna, LIN, Jui-Yen, ZHOU, Baosuo
Year of Publication 14.12.2022
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Year of Publication 14.12.2022
Patent