Reconfigurable Adaptive Multiple Transform Hardware Solutions for Versatile Video Coding
Sau, Carlo, Ligas, Dario, Fanni, Tiziana, Raffo, Luigi, Palumbo, Francesca
Published in IEEE access (2019)
Published in IEEE access (2019)
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Journal Article
Feasibility Study and Porting of the Damped Least Square Algorithm on FPGA
Sau, Carlo, Fanni, Tiziana, Rubattu, Claudio, Fanni, Luca, Raffo, Luigi, Palumbo, Francesca
Published in IEEE access (2020)
Published in IEEE access (2020)
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Journal Article
The Multi-Dataflow Composer tool: An open-source tool suite for optimized coarse-grain reconfigurable hardware accelerators and platform design
Sau, Carlo, Fanni, Tiziana, Rubattu, Claudio, Raffo, Luigi, Palumbo, Francesca
Published in Microprocessors and microsystems (01.02.2021)
Published in Microprocessors and microsystems (01.02.2021)
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Journal Article
Runtime Adaptive IoMT Node on Multi-Core Processor Platform
Scrugli, Matteo Antonio, Meloni, Paolo, Sau, Carlo, Raffo, Luigi
Published in Electronics (Basel) (01.11.2021)
Published in Electronics (Basel) (01.11.2021)
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Journal Article
Mutual Impact between Clock Gating and High Level Synthesis in Reconfigurable Hardware Accelerators
Ratto, Francesco, Fanni, Tiziana, Raffo, Luigi, Sau, Carlo
Published in Electronics (Basel) (01.01.2021)
Published in Electronics (Basel) (01.01.2021)
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Journal Article
Coarse-grained reconfiguration: dataflow-based power management
Palumbo, Francesca, Sau, Carlo, Raffo, Luigi
Published in Chronic diseases and translational medicine (01.01.2015)
Published in Chronic diseases and translational medicine (01.01.2015)
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Journal Article
An Automated Design Flow for Adaptive Neural Network Hardware Accelerators
Ratto, Francesco, Máinez, Ángela Porras, Sau, Carlo, Meloni, Paolo, Deriu, Gianfranco, Delucchi, Stefano, Massa, Massimo, Raffo, Luigi, Palumbo, Francesca
Published in Journal of signal processing systems (01.09.2023)
Published in Journal of signal processing systems (01.09.2023)
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Journal Article
Automated Design Flow for Multi-Functional Dataflow-Based Platforms
Sau, Carlo, Meloni, Paolo, Raffo, Luigi, Palumbo, Francesca, Bezati, Endri, Casale-Brunet, Simone, Mattavelli, Marco
Published in Journal of signal processing systems (01.10.2016)
Published in Journal of signal processing systems (01.10.2016)
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Journal Article
An integrated hardware/software design methodology for signal processing systems
Li, Lin, Sau, Carlo, Fanni, Tiziana, Li, Jingui, Viitanen, Timo, Christophe, François, Palumbo, Francesca, Raffo, Luigi, Huttunen, Heikki, Takala, Jarmo, Bhattacharyya, Shuvra S.
Published in Journal of systems architecture (01.02.2019)
Published in Journal of systems architecture (01.02.2019)
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Journal Article
Challenging the Best HEVC Fractional Pixel FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing
Sau, Carlo, Palumbo, Francesca, Pelcat, Maxime, Heulot, Julien, Nogues, Erwan, Menard, Daniel, Meloni, Paolo, Raffo, Luigi
Published in IEEE embedded systems letters (01.09.2017)
Published in IEEE embedded systems letters (01.09.2017)
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Journal Article
Dataflow-Functional High-Level Synthesis for Coarse-Grained Reconfigurable Accelerators
Rubattu, Claudio, Palumbo, Francesca, Sau, Carlo, Salvador, Ruben, Serot, Jocelyn, Desnos, Karol, Raffo, Luigi, Pelcat, Maxime
Published in IEEE embedded systems letters (01.09.2019)
Published in IEEE embedded systems letters (01.09.2019)
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Journal Article
Early Stage Automatic Strategy for Power-Aware Signal Processing Systems Design
Sau, Carlo, Carta, Nicola, Raffo, Luigi, Palumbo, Francesca
Published in Journal of signal processing systems (01.03.2016)
Published in Journal of signal processing systems (01.03.2016)
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Journal Article
Design and management of image processing pipelines within CPS: Acquired experience towards the end of the FitOptiVis ECSEL Project
Sau, Carlo, Rinaldi, Claudia, Pomante, Luigi, Palumbo, Francesca, Valente, Giacomo, Fanni, Tiziana, Martinez, Marcos, van der Linden, Frank, Basten, Twan, Geilen, Marc, Peeren, Geran, Kadlec, Jiří, Jääskeläinen, Pekka, Bulej, Lubomír, Barranco, Francisco, Saarinen, Jukka, Säntti, Tero, Zedda, Maria Katiuscia, Sanchez, Victor, Nikkhah, Shayan Tabatabaei, Goswami, Dip, Amat, Guillermo, Maršík, Lukáš, van Helvoort, Mark, Medina, Luis, Al-Ars, Zaid, de Beer, Ad
Published in Microprocessors and microsystems (01.11.2021)
Published in Microprocessors and microsystems (01.11.2021)
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Journal Article
Hardware design methodology using lightweight dataflow and its integration with low power techniques
Fanni, Tiziana, Li, Lin, Viitanen, Timo, Sau, Carlo, Xie, Renjie, Palumbo, Francesca, Raffo, Luigi, Huttunen, Heikki, Takala, Jarmo, Bhattacharyya, Shuvra S.
Published in Journal of systems architecture (01.08.2017)
Published in Journal of systems architecture (01.08.2017)
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Journal Article
Hardware/Software Self-adaptation in CPS: The CERBERO Project Approach
Palumbo, Francesca, Fanni, Tiziana, Sau, Carlo, Rodríguez, Alfonso, Madroñal, Daniel, Desnos, Karol, Morvan, Antoine, Pelcat, Maxime, Rubattu, Claudio, Lazcano, Raquel, Raffo, Luigi, de la Torre, Eduardo, Juárez, Eduardo, Sanz, César, Sánchez de Rojas, Pablo
Published in Embedded Computer Systems: Architectures, Modeling, and Simulation (2019)
Published in Embedded Computer Systems: Architectures, Modeling, and Simulation (2019)
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Book Chapter
The Multi-Dataflow Composer Tool: an open-source tool suite for Optimized Coarse-Grain Reconfigurable Hardware Accelerators and Platform Design
Sau, Carlo, Fanni, Tiziana, Rubattu, Claudio, Raffo, Luigi, Palumbo, Francesca
Published in arXiv.org (05.03.2021)
Published in arXiv.org (05.03.2021)
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Paper
Journal Article
Layering the monitoring action for improved flexibility and overhead control: work-in-progress
Valente, Giacomo, Fanni, Tiziana, Sau, Carlo, Di Battista, Francesco
Published in 2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) (20.09.2020)
Published in 2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) (20.09.2020)
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Conference Proceeding