A Low-Power Multi-Gate FET CMOS Technology with 13.9ps Inverter Delay, Large-Scale Integrated High Performance Digital Circuits and SRAM
von Arnim, K., Augendre, E., Pacha, A.C., Schulz, T., San, K.T., Bauer, F., Nackaerts, A., Rooyackers, R., Vandeweyer, T., Degroote, B., Collaert, N., Dixit, A., Singanamalla, R., Xiong, W., Marshall, A., Cleavelin, C.R., Schrufer, K., Jurczak, M.
Published in 2007 IEEE Symposium on VLSI Technology (01.06.2007)
Published in 2007 IEEE Symposium on VLSI Technology (01.06.2007)
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Conference Proceeding
Multi-gate devices for the 32nm technology node and beyond
Collaert, N., Rooyackers, R., Schulz, T., San, K.T., Son, N.J., Van Dal, M.J.H., Verheyen, P., von Arnim, K., Witters, L., De Meyer, K., Biesemans, S., De Keersgieter, A., Jurczak, M., Dixit, A., Ferain, I., Lai, L.-S., Lenoble, D., Mercha, A., Nackaerts, A., Pawlak, B.J.
Published in ESSDERC 2007 - 37th European Solid State Device Research Conference (01.09.2007)
Published in ESSDERC 2007 - 37th European Solid State Device Research Conference (01.09.2007)
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Conference Proceeding
Multi-gate devices for the 32nm technology node and beyond
Collaert, N., De Keersgieter, A., Dixit, A., Ferain, I., Lai, L.-S., Lenoble, D., Mercha, A., Nackaerts, A., Pawlak, B.J., Rooyackers, R., Schulz, T., San, K.T., Son, N.J., Van Dal, M.J.H., Verheyen, P., von Arnim, K., Witters, L., De Meyer, K., Biesemans, S., Jurczak, M.
Published in Solid-state electronics (01.09.2008)
Published in Solid-state electronics (01.09.2008)
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Journal Article
Analysis of the FinFET parasitics for improved RF performances
Parvais, B., Dehan, M., Subramanian, V., Mercha, A., San, K.T., Jurczak, M., Groeseneken, G., Sansen, W., Decoutere, S.
Published in 2007 IEEE International SOI Conference (01.10.2007)
Published in 2007 IEEE International SOI Conference (01.10.2007)
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Conference Proceeding
Efficiency of low-power design techniques in Multi-Gate FET CMOS Circuits
Pacha, C., von Arnim, K., Bauer, F., Schulz, T., Xiong, W., San, K.T., Marshall, A., Baumann, T., Cleavelin, C.-R., Schruefer, K., Berthold, J.
Published in ESSCIRC 2007 - 33rd European Solid-State Circuits Conference (01.09.2007)
Published in ESSCIRC 2007 - 33rd European Solid-State Circuits Conference (01.09.2007)
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Conference Proceeding
Layout options for stability tuning of SRAM cells in multi-gate-FET technologies
Bauer, F., von Arnim, K., Pacha, C., Schulz, T., Fulde, M., Nackaerts, A., Jurczak, M., Xiong, W., San, K.T., Cleavelin, C.-R., Schrufer, K., Georgakos, G., Schmitt-Landsiedel, D.
Published in ESSCIRC 2007 - 33rd European Solid-State Circuits Conference (01.09.2007)
Published in ESSCIRC 2007 - 33rd European Solid-State Circuits Conference (01.09.2007)
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Conference Proceeding
Efficiency of low-power design techniques in multi-gate FET CMOS circuits
Pacha, C., von Arnim, K., Bauer, F., Schulz, T., Xiong, W., San, K.T., Marshall, A., Baumann, T., Cleavelin, C.-R., Schruefer, K., Berthold, J.
Published in ESSDERC 2007 - 37th European Solid State Device Research Conference (01.09.2007)
Published in ESSDERC 2007 - 37th European Solid State Device Research Conference (01.09.2007)
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Conference Proceeding
Metal Gate Technology using a Dy2O3 Dielectric Cap Approach for multiple-VT in NMOS FinFETs
Ferain, I., Son, N.J., Witters, L., Collaert, N., Onsia, B., Kaczer, B., Kauerauf, T., Adelmann, C., Favia, P., Richard, O., Bender, H., Van Elshocht, S., Lehnen, P., San, K.T., De Meyer, K., Biesemans, S., Jurczak, M.
Published in 2007 IEEE International SOI Conference (01.10.2007)
Published in 2007 IEEE International SOI Conference (01.10.2007)
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Conference Proceeding
A new technique for determining the capacitive coupling coefficients in flash EPROMs
San, K.T., Kaya, C., Liu, D.K.Y., Ma, T.-P., Shah, P.
Published in IEEE electron device letters (01.06.1992)
Published in IEEE electron device letters (01.06.1992)
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Journal Article