Novel BIST Solution to Test the TSV Interconnects in 3D Stacked IC’s
Vethamuthu Edward Alaises, Renold Sam, Sathasivam, Sivanantham
Published in Electronics (Basel) (01.02.2023)
Published in Electronics (Basel) (01.02.2023)
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Journal Article
Implementation of Hierarchical DFT Approach for Better Testability
Renold Sam Vethamuthu, E, Sivanantham, S, Sakthivel, R
Published in 2018 International Conference on Emerging Trends and Innovations In Engineering And Technological Research (ICETIETR) (01.07.2018)
Published in 2018 International Conference on Emerging Trends and Innovations In Engineering And Technological Research (ICETIETR) (01.07.2018)
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Conference Proceeding