A 76-MHz BiCMOS programmable logic sequencer
Chiakang Sung, Sasaki, P.T., Leung, R., Yuet-Ming Chu, Le, K.M., Conner, G.W., Lane, R.H., De Jong, J.L., Cline, R.
Published in IEEE journal of solid-state circuits (01.10.1989)
Published in IEEE journal of solid-state circuits (01.10.1989)
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Journal Article
A 90-nm FPGA I/O buffer design with 1.6-Gb/s data rate for source-synchronous system and 300-MHz clock rate for external memory interface
Tyhach, J., Wang, B., Sung, C., Huang, J., Nguyen, K., Xiaobao Wang, Yan Chong, Pan, P., Kim, H., Rangan, G., Tzung-Chin Chang, Tan, J.
Published in IEEE journal of solid-state circuits (01.09.2005)
Published in IEEE journal of solid-state circuits (01.09.2005)
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Journal Article
Conference Proceeding
On-die input reference voltage with self-calibrating duty cycle correction
Wang Xiaobao, Sung Chiakang, Nguyen Khai, Chong Yan, Huang Joseph, Wang Bonnie I, Nagarajan Pradeep
Year of Publication 18.07.2017
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Year of Publication 18.07.2017
Patent
Programmable High-Speed I/O Interface
Sung Chiakang, Huang Joseph, Wang Bonnie I, Pan Philip Y, Nguyen Khai Q
Year of Publication 05.01.2017
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Year of Publication 05.01.2017
Patent