Focused technologies in near future from OSAT view point
Katsumata, Akio, Takashima, Akira, Sawada, Kazuhiro, Sumihara, Hideki, Ito, Norio
Published in 2017 IEEE Electron Devices Technology and Manufacturing Conference (EDTM) (01.02.2017)
Published in 2017 IEEE Electron Devices Technology and Manufacturing Conference (EDTM) (01.02.2017)
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Conference Proceeding
EEPROM HAVING WRITE/VERIFY CONTROL CIRCUIT
MOMODOMI, MASAKI, DANAKA, YOSHIYUKI, DANAKA, DOMOHARU, SAITO, SINJI, SUMIHARA, HIDEKI, OUCHI, GAZUNORI, SAKUI, GOJI, IWATA, YOSHIHISA
Year of Publication 09.02.1996
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Year of Publication 09.02.1996
Patent
JPH0626240B
TANAKA SHINICHI, HARADA HIROSHI, ASANO MASAMICHI, SUMIHARA HIDEKI, IWAHASHI HIROSHI
Year of Publication 06.04.1994
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Year of Publication 06.04.1994
Patent
Nichtflüchtige Halbleiter-Speicheranordnung
OHUCHI, KAZUNORI, TANAKA, YOSHIYUKI, SAITO, SHINJI, MOMODOMI, MASAKI, TANAKA, TOMOHARU, SAKUI, KOJI, SUMIHARA, HIDEKI, IWATA, YOSHIHISA
Year of Publication 06.04.2000
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Year of Publication 06.04.2000
Patent
JPH0527263B
TANAKA SHINICHI, HARADA HIROSHI, ASANO MASAMICHI, SUMIHARA HIDEKI, IWAHASHI HIROSHI
Year of Publication 20.04.1993
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Year of Publication 20.04.1993
Patent
NONVOLATILE SEMICONDUCTOR MEMORY SYSTEM
TANAKA TOMOHARU, SUMIHARA HIDEKI, MOMOTOMI MASAKI, OUCHI KAZUNORI, SAITO SHINJI
Year of Publication 02.04.1993
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Year of Publication 02.04.1993
Patent
PROTECTION DEVICE FOR A MOS TRANSISTOR
IWAHASHI, HIROSHI, TANAKA, SHINICHI, HARADA, HIROSHI, SUMIHARA, HIDEKI, ASANO, MASAMICHI
Year of Publication 26.06.1991
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Year of Publication 26.06.1991
Patent
Sense amplifier for use in an EEPROM
OHUCHI; KAZUNORI, TANAKA; YOSHIYUKI, SUMIHARA; HIDEKI, TANAKA; TOMOHARU, IWATA; YOSHIHISA, MOMODOMI; MASAKI, SAKUI; KOJI, SAITO; SHINJI
Year of Publication 14.04.1998
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Year of Publication 14.04.1998
Patent
Semiconductor integrated circuit
HARADA; HIROSHI, SUMIHARA; HIDEKI, IWAHASHI; HIROSHI, TANAKA; SHINICHI, ASANO; MASAMICHI
Year of Publication 16.02.1988
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Year of Publication 16.02.1988
Patent
PROTECTION DEVICE FOR A MOS TRANSISTOR
IWAHASHI, HIROSHI, TANAKA, SHINICHI, HARADA, HIROSHI, SUMIHARA, HIDEKI, ASANO, MASAMICHI
Year of Publication 20.11.1986
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Year of Publication 20.11.1986
Patent
SEMICONDUCTOR INTEGRATED CIRCUIT
TANAKA SHINICHI, HARADA HIROSHI, ASANO MASAMICHI, SUMIHARA HIDEKI, IWAHASHI HIROSHI
Year of Publication 18.10.1985
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Year of Publication 18.10.1985
Patent
SEMICONDUCTOR INTEGRATED CIRCUIT
TANAKA SHINICHI, HARADA HIROSHI, ASANO MASAMICHI, SUMIHARA HIDEKI, IWAHASHI HIROSHI
Year of Publication 18.10.1985
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Year of Publication 18.10.1985
Patent
Protection device for a MOS transistor
IWAHASHI, HIROSHI, TANAKA, SHINICHI, HARADA, HIROSHI, SUMIHARA, HIDEKI, ASANO, MASAMICHI
Year of Publication 09.10.1985
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Year of Publication 09.10.1985
Patent
EEPROM assembly with writing and verifying control unit - assigns array of floating gate through tunnelling memory cell transistors in lines and columns to each EEPROM
TANAKA, YOSHIYUKI, TOKIO/TOKYO, JP, OHUCHI, KAZUNORI, SAITO, SHINJI, YOKOHAMA, JP, SUMIHARA, HIDEKI, OOITA, JP, TANAKA, TOMOHARU, YOKOHAMA, JP, SAKUI, KOJI, TOKIO/TOKYO, JP, MOMODOMI, MASAKI, IWATA, YOSHIHISA, YOKOHAMA, JP
Year of Publication 20.08.1992
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Year of Publication 20.08.1992
Patent