High-Precision Wafer-Level Cu-Cu Bonding for 3-DICs
Sugaya, Isao, Okada, Masashi, Mitsuishi, Hajime, Maeda, Hidehiro, Shimoda, Toshimasa, Izumi, Shigeto, Nakahira, Hosei, Okamoto, Kazuya
Published in IEEE transactions on electron devices (01.12.2015)
Published in IEEE transactions on electron devices (01.12.2015)
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Journal Article
New precision alignment methodology for CMOS wafer bonding
Sugaya, Isao, Mitsuishi, Hajime, Maeda, Hidehiro, Okada, Masashi, Okamoto, Kazuya
Published in 2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) (01.10.2014)
Published in 2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) (01.10.2014)
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Conference Proceeding
Demonstration of 50 nm Overlay Accuracy for Wafer-to-Wafer Bonding and Further Improvement Study
Mitsuishi, Hajime, Mori, Hiroshi, Maeda, Hidehiro, Ushijima, Mikio, Aramata, Masanori, Fukuda, Minoru, Okada, Masashi, Kanbayashi, Masahiro, Shimoda, Toshimasa, Sugaya, Isao
Published in 2022 IEEE 24th Electronics Packaging Technology Conference (EPTC) (07.12.2022)
Published in 2022 IEEE 24th Electronics Packaging Technology Conference (EPTC) (07.12.2022)
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Conference Proceeding