A 10.3-GS/s, 6-Bit Flash ADC for 10G Ethernet Applications
Varzaghani, Aida, Kasapi, Athos, Loizos, Dimitri N., Song-Hee Paik, Verma, Shwetabh, Zogopoulos, Sotirios, Sidiropoulos, Stefanos
Published in IEEE journal of solid-state circuits (01.12.2013)
Published in IEEE journal of solid-state circuits (01.12.2013)
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A 1-to-112Gb/s DSP-Based Wireline Transceiver with a Flexible Clocking Scheme in 5nm FinFET
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Published in 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) (12.06.2022)
Published in 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) (12.06.2022)
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Conference Proceeding
A 0.4-4-Gb/s CMOS quad transceiver cell using on-chip regulated dual-loop PLLs
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Published in IEEE journal of solid-state circuits (01.05.2003)
Published in IEEE journal of solid-state circuits (01.05.2003)
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A 10.3GS/s 6b flash ADC for 10G Ethernet applications
Verma, S., Kasapi, A., Li-min Lee, Liu, D., Loizos, D., Song-Hee Paik, Varzaghani, A., Zogopoulos, S., Sidiropoulos, S.
Published in 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers (01.02.2013)
Published in 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers (01.02.2013)
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Conference Proceeding
A variable-frequency parallel I/O interface with adaptive power-supply regulation
Gu-Yeon Wei, Kim, J., Liu, D., Sidiropoulos, S., Horowitz, M.A.
Published in IEEE journal of solid-state circuits (01.11.2000)
Published in IEEE journal of solid-state circuits (01.11.2000)
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Weighted round-robin cell multiplexing in a general-purpose ATM switch chip
Katevenis, M., Sidiropoulos, S., Courcoubetis, C.
Published in IEEE journal on selected areas in communications (01.10.1991)
Published in IEEE journal on selected areas in communications (01.10.1991)
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Differential clock skew detector
Sidiropoulos, Stefanos, Izad, Mehran Mohammadi, Bozorgzadeh, Bardia, Varzaghani, Aida
Year of Publication 24.05.2022
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Year of Publication 24.05.2022
Patent
Memory component with pattern register circuitry to provide data patterns for calibration
Sidiropoulos, Stefanos, Perego, Richard E, Ware, Frederick A, Hampel, Craig E, Tsern, Ely K
Year of Publication 25.01.2022
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Year of Publication 25.01.2022
Patent
A semi-digital DLL with unlimited phase shift capability and 0.08-400 MHz operating range
Sidiropoulos, S., Horowitz, M.
Published in 1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers (01.01.1997)
Published in 1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers (01.01.1997)
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