A 16-Gb/s Backplane Transceiver With 12-Tap Current Integrating DFE and Dynamic Adaptation of Voltage Offset and Timing Drifts in 45-nm SOI CMOS Technology
Gangasani, G. R., Chun-Ming Hsu, Bulzacchelli, J. F., Rylov, S., Beukema, T., Freitas, D., Kelly, W., Shannon, M., Jieming Qi, Xu, H. H., Natonio, J., Rasmus, T., Jong-Ru Guo, Wielgos, M., Garlett, J., Sorna, M. A., Meghelli, M.
Published in IEEE journal of solid-state circuits (01.08.2012)
Published in IEEE journal of solid-state circuits (01.08.2012)
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Journal Article
Conference Proceeding
40-Gb/s circuits built from a 120-GHz f/T/ SiGe technology
Freeman, G, Meghelli, M, Kwark, Y, Zier, S, Rylyakov, A, Sorna, M A, Tanji, T, Schreiber, O M, Walter, K, Rieh, Jae-Sung, Jagannathan, B, Joseph, A, Subbanna, S
Published in IEEE journal of solid-state circuits (01.09.2002)
Published in IEEE journal of solid-state circuits (01.09.2002)
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Journal Article
A 16-Gb/s backplane transceiver with 12-tap current integrating DFE and dynamic adaptation of voltage offset and timing drifts in 45-nm SOI CMOS technology
Gangasani, G. R., Chun-Ming Hsu, Bulzacchelli, J. F., Rylov, S., Beukema, T., Freitas, D., Kelly, W., Shannon, M., Jieming Qi, Xu, H. H., Natonio, J., Rasmus, T., Jong-Ru Guo, Wielgos, M., Garlett, J., Sorna, M. A., Meghelli, M.
Published in 2011 IEEE Custom Integrated Circuits Conference (CICC) (01.09.2011)
Published in 2011 IEEE Custom Integrated Circuits Conference (CICC) (01.09.2011)
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Conference Proceeding
40-Gb/s circuits built from a 120-GHz f sub(T) SiGe technology
Freeman, Greg, Meghelli, Mounir, Kwark, Young, Zier, Steven, Rylyakov, Alexander, Sorna, Michael A, Tanji, Todd, Schreiber, Oswin M, Walter, Keith, Rieh, Jae-Sung, Jagannathan, Basanth, Joseph, Alvin, Subbanna, Seshadri
Published in IEEE journal of solid-state circuits (01.09.2002)
Published in IEEE journal of solid-state circuits (01.09.2002)
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Journal Article