14-nm FinFET Technology for Analog and RF Applications
Singh, Jagar, Ciavatti, J., Sundaram, K., Wong, J. S., Bandyopadhyay, A., Zhang, X., Li, S., Bellaouar, A., Watts, J., Lee, J. G., Samavedam, S. B.
Published in IEEE transactions on electron devices (01.01.2018)
Published in IEEE transactions on electron devices (01.01.2018)
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Characterization of MOSFETs fabricated on large-grain polysilicon on insulator
Jagar, Singh, Chan, Mansun, Wang, Hongmei, Poon, Vincent M.C., Myasnikov, A.M.
Published in Solid-state electronics (01.05.2001)
Published in Solid-state electronics (01.05.2001)
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LDMOS FETTRENCH ISOLATION HAVING THREE PORTIONS WITH DIFFERENT MATERIALS AND LDMOS FET INCLUDING SAME
JOHNSON JEFFREY B, LIOU RONG TING, SINGH JAGAR, ZHENG WANG, GU MAN, WANG HAITING
Year of Publication 01.08.2023
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Year of Publication 01.08.2023
Patent
N-type Schottky barrier source/drain MOSFET using ytterbium silicide
Shiyang Zhu, Jingde Chen, Li, M.-F., Lee, S.J., Singh, J., Zhu, C.X., Du, A., Tung, C.H., Chin, A., Kwong, D.L.
Published in IEEE electron device letters (01.08.2004)
Published in IEEE electron device letters (01.08.2004)
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Germanium pMOSFETs with Schottky-Barrier germanide S/D, high-κ gate dielectric and metal gate
ZHU, Shiyang, LI, Rui, LEE, S. J, LI, M. F, DU, Anyan, SINGH, Jagar, ZHU, Chunxiang, CHIN, Albert, KWONG, D. L
Published in IEEE electron device letters (01.02.2005)
Published in IEEE electron device letters (01.02.2005)
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