Search Results - "SIERS SCOTT E" :: K.UTB vyhledávací portál | TBU Library Retrieval Portal

PROCESSOR POWER CONSUMPTION CONTROL AND VOLTAGE DROP VIA MICRO-ARCHITECTURAL BANDWIDTH THROTTLING

PROCESSOR POWER CONSUMPTION CONTROL AND VOLTAGE DROP VIA MICRO-ARCHITECTURAL BANDWIDTH THROTTLING

by SIERS SCOTT E, GAMSARAGAN EDWARD, JAHAGIRDAR SANJEEV
Year of Publication 25.05.2011

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Patent

SCALABLE PACKAGE ARCHITECTURE USING RETICLE STITCHING AND PHOTONICS FOR ZETTA-SCALE INTEGRATED CIRCUITS

SCALABLE PACKAGE ARCHITECTURE USING RETICLE STITCHING AND PHOTONICS FOR ZETTA-SCALE INTEGRATED CIRCUITS

by Kokar, Altug, Damaraju, Satish, Siers, Scott E, Gomes, Wilfred, Davis, Mark C
Year of Publication 02.11.2023

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Patent

SCALABLE PACKAGE ARCHITECTURE USING RETICLE STITCHING AND PHOTONICS FOR ZETTA-SCALE INTEGRATED CIRCUITS

SCALABLE PACKAGE ARCHITECTURE USING RETICLE STITCHING AND PHOTONICS FOR ZETTA-SCALE INTEGRATED CIRCUITS

by SIERS, Scott E, KOKAR, Altug, DAMARAJU, Satish, GOMES, Wilfred, DAVIS, Mark C
Year of Publication 02.11.2023

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Patent

PACKAGE ARCHITECTURE OF LARGE DIES USING QUASI-MONOLITHIC CHIP LAYERS

PACKAGE ARCHITECTURE OF LARGE DIES USING QUASI-MONOLITHIC CHIP LAYERS

by Pasdast, Gerald S, Siers, Scott E, Seangatith, Jiraporn, Liff, Shawna M, Elsherbini, Adel A, Tiagaraj, Sathya Narasimman, Kabir, Mohammad Enamul, Braunisch, Henning, Jun, Kimin, Swan, Johanna M
Year of Publication 22.02.2024

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Patent

SELECTIVE ROUTING THROUGH INTRA-CONNECT BRIDGE DIES

SELECTIVE ROUTING THROUGH INTRA-CONNECT BRIDGE DIES

by Kolluru, Kalyan C, Pasdast, Gerald S, Qian, Zhiguo, Siers, Scott E, Liff, Shawna M, Elsherbini, Adel A, Tiagaraj, Sathya Narasimman, Rajan, Vivek Kumar, Swan, Johanna M
Year of Publication 15.12.2022

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Patent

controle de consumo de energia de processador e queda de tensão via estrangulamento de largura de banda microarquitetural

controle de consumo de energia de processador e queda de tensão via estrangulamento de largura de banda microarquitetural

by EDWARD GAMSARAGAN, SCOTT E. SIERS, SANJEEV JAHAGIRDAR
Year of Publication 01.12.2015

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Patent

PROCESSOR POWER CONSUMPTION CONTROL AND VOLTAGE DROP VIA MICRO-ARCHITECTURAL BANDWIDTH THROTTLING

PROCESSOR POWER CONSUMPTION CONTROL AND VOLTAGE DROP VIA MICRO-ARCHITECTURAL BANDWIDTH THROTTLING

by SIERS SCOTT E, GAMSARAGAN EDWARD, JAHAGIRDAR SANJEEV
Year of Publication 16.08.2012

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Patent

Processor power consumption control and voltage drop via micro-architectural bandwidth throttling

Processor power consumption control and voltage drop via micro-architectural bandwidth throttling

by SIERS SCOTT E, GAMSARAGAN EDWARD, JAHAGIRDAR SANJEEV
Year of Publication 27.09.2011

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Patent

Processor power consumption control and voltage drop via micro-architectural bandwidth throttling

Processor power consumption control and voltage drop via micro-architectural bandwidth throttling

by Jahagirdar, Sanjeev, Gamsaragan, Edward, Siers, Scott E
Year of Publication 27.09.2011

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Patent

Memory cell write

Memory cell write

by Damaraju, Satish K, Ahmed, Ak R, Siers, Scott E
Year of Publication 01.01.2013

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Patent

PROCESSOR POWER CONSUMPTION CONTROL AND VOLTAGE DROP VIA MICRO-ARCHITECTURAL BANDWIDTH THROTTLING

PROCESSOR POWER CONSUMPTION CONTROL AND VOLTAGE DROP VIA MICRO-ARCHITECTURAL BANDWIDTH THROTTLING

by GAMSARAGAN, EDWARD, SIERS, SCOTT E, JAHAGIRDAR, SANJEEV
Year of Publication 27.05.2010

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Patent

Processor power consumption control and voltage drop via micro-architectural bandwidth throttling

Processor power consumption control and voltage drop via micro-architectural bandwidth throttling

by SIERS SCOTT E, GAMSARAGAN EDWARD, JAHAGIRDAR SANJEEV
Year of Publication 25.03.2010

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Patent

PROCESSOR POWER CONSUMPTION CONTROL AND VOLTAGE DROP VIA MICRO-ARCHITECTURAL BANDWIDTH THROTTLING

PROCESSOR POWER CONSUMPTION CONTROL AND VOLTAGE DROP VIA MICRO-ARCHITECTURAL BANDWIDTH THROTTLING

by GAMSARAGAN, EDWARD, SIERS, SCOTT E, JAHAGIRDAR, SANJEEV
Year of Publication 25.03.2010

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Patent

Processor power consumption control and voltage drop via micro-architectural bandwidth throttling

Processor power consumption control and voltage drop via micro-architectural bandwidth throttling

by GAMSARAGAN, EDWARD, SIERS, SCOTT E, JAHAGIRDAR, SANJEEV
Year of Publication 01.03.2016

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Patent

Memory cell write

Memory cell write

by Damaraju, Satish K, Ahmed, Ak R, Siers, Scott E
Year of Publication 01.11.2011

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Patent

Processor power consumption control and voltage drop via micro-architectural bandwidth throttling

Processor power consumption control and voltage drop via micro-architectural bandwidth throttling

by GAMSARAGAN, EDWARD, SIERS, SCOTT E, JAHAGIRDAR, SANJEEV
Year of Publication 16.11.2014

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Patent

Memory cell write

Memory cell write

by SIERS SCOTT E, DAMARAJU SATISH K, AHMED AK R
Year of Publication 01.01.2013

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Patent

Processor power consumption control and voltage drop via micro-architectural bandwidth throttling

Processor power consumption control and voltage drop via micro-architectural bandwidth throttling

by GAMSARAGAN, EDWARD, SIERS, SCOTT E, JAHAGIRDAR, SANJEEV
Year of Publication 01.04.2014

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Patent

MEMORY CELL WRITE

MEMORY CELL WRITE

by SIERS SCOTT E, DAMARAJU SATISH K, AHMED AK R
Year of Publication 16.02.2012

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Patent

Memory cell write

Memory cell write

by SIERS SCOTT E, DAMARAJU SATISH K, AHMED AK R
Year of Publication 01.11.2011

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Patent