Search Results - "SHIPPY DAVID JAMES" :: K.UTB vyhledávací portál

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SPECULATIVE EXECUTION FOLLOWING BARRIER INSTRUCTION

by SHIPPY DAVID JAMES, THATCHER LARRY EDWARD, ARIMILLI RAVI KUMAR, KAHLE JAMES ALLAN
Year of Publication 31.12.2002

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System for rejecting and reissuing instructions after a variable delay time period

by Le, Hung Qui, Shippy, David James
Year of Publication 25.11.2003

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Integrated level two cache and controller with multiple ports, L1 bypass and concurrent accessing

by SHIPPY DAVID JAMES, SHULER DAVID BENJAMIN
Year of Publication 01.05.2001

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System for rejecting and reissuing instructions after a variable delay time period

by LE HUNG QUI, SHIPPY DAVID JAMES
Year of Publication 25.11.2003

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System and method for dynamically selecting storage instruction performance scheme

by DEMENT JONATHAN JAMES,ABERNATHY CHRISTOPHER MICHAEL,VAN NORSTRAND JR. ALBERT JAMES,SHIPPY DAVID
Year of Publication 30.05.2007

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Multithreading recycle and dispatch system and method thereof

by VAN NORSTRAND JR. ALBERT JAMES,SHIPPY DAVID,FEISTE KURT ALAN
Year of Publication 23.08.2006

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A METHOD AND SYSTEM FOR OPTIMALLY ISSUING DEPENDENT INSTRUCTIONS BASED ON SPECULATIVE L2 CACHE HIT IN A DATA PROCESSING SYSTEM

by LARRY EDWARD THATCHER, ROBERT ALAN CARGNONI, BRUCE JOSEPH RONCHETTI, DAVID JAMES SHIPPY
Year of Publication 31.07.2006

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COMPUTER SYSTEM, AS WELL AS METHOD OF TRANSMITTING INFORMATION FROM THE EXTERNAL CACHE AND THE MAIN MEMORY TO THE PROCESSOR OF THE COMPUTER SYSTEM

by SHIPPY,DAVID JAMES, SHULER,DAVID BENJAMIN
Year of Publication 28.07.1997

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INTEGRATED LEVEL TWO CACHE AND MEMORY CONTROLLER WITH MULTIPLE DATA PORTS

by SHIPPY, DAVID, JAMES, SHULER, DAVID, BENJAMIN
Year of Publication 05.03.1997

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INTEGRATED SECOND-LEVEL CACHE MEMORY AND MEMORY CONTROLLER WITH MULTIPLE-ACCESS DATA PORTS

by SHIPPY DAVID JAMES, SHULER DAVID BENJAMIN
Year of Publication 03.03.1997

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System for store forwarding assigning load and store instructions to groups and reorder queues to keep track of program order

by RONCHETTI BRUCE JOSEPH, FEISTE KURT ALAN, SHIPPY DAVID JAMES
Year of Publication 19.02.2002

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System for store forwarding assigning load and store instructions to groups and reorder queues to keep track of program order

by Feiste, Kurt Alan, Ronchetti, Bruce Joseph, Shippy, David James
Year of Publication 19.02.2002

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Integrated level teo cache and memory controller with multiple data ports

by DAVID BENJAMIN SHULER, DAVID JAMES SHIPPY
Year of Publication 05.06.1996

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INTEGRATED LEVEL TWO CACHE AND MEMORY CONTROLLER WITH MULTIPLE DATA PORTS

by SHIPPY, DAVID, JAMES, SHULER, DAVID, BENJAMIN
Year of Publication 30.11.1995

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Programmable content mode level two cache

by SHIPPY, DAVID JAMES, SHULER, DAVID BENJAMIN
Year of Publication 22.11.1995

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Determining successful completion of an instruction by comparing the number of pending instruction cycles with a number based on the number of stages in the pipeline

by Kahle, James Allan, Le, Hung Qui, Moore, Charles Roberts, Shippy, David James, Thatcher, Larry Edward
Year of Publication 02.12.2003

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A method and system for optimally issuing dependent instructions based on speculative L2 cache hit in a data processing system

by SHIPPY, DAVID JAMES, RONCHETTI, BRUCE JOSEPH, THATCHER, LARRY EDWARD, CARGNONI, ROBERT ALAN
Year of Publication 21.11.2003

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Recovery from hang condition in a microprocessor

by Kahle, James Allan, Le, Hung Qui, Reick, Kevin F, Shippy, David James, Thatcher, Larry Edward
Year of Publication 01.04.2003

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Method and system for optimally issuing dependent instructions based on speculative L2 cache hit in a data processing system

by RONCHETTI BRUCE JOSEPH, CARGNONI ROBERT ALAN, SHIPPY DAVID JAMES, THATCHER LARRY EDWARD
Year of Publication 03.12.2002

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Method and system for optimally issuing dependent instructions based on speculative L2 cache hit in a data processing system

by Cargnoni, Robert Alan, Ronchetti, Bruce Joseph, Shippy, David James, Thatcher, Larry Edward
Year of Publication 03.12.2002

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