A new low latency Viterbi decoder core
Ahmed Shebaita, Mohamed Khairy, Ali Ezzat Salama, Mahmoud Ashour
Published in 2003 46th Midwest Symposium on Circuits and Systems (2003)
Published in 2003 46th Midwest Symposium on Circuits and Systems (2003)
Get full text
Conference Proceeding
Multiple Threshold Voltage Design Scheme for CMOS Tapered Buffers
Shebaita, A., Ismail, Y.
Published in IEEE transactions on circuits and systems. II, Express briefs (01.01.2008)
Published in IEEE transactions on circuits and systems. II, Express briefs (01.01.2008)
Get full text
Journal Article
Variable Threshold Voltage Design Scheme for CMOS Tapered Buffers
Shebaita, Ahmed, Ismail, Yehea
Published in 2007 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2007)
Published in 2007 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2007)
Get full text
Conference Proceeding
FA-STAC: A Framework for Fast and Accurate Static Timing Analysis with Coupling
Das, D., Shebaita, A., Hai Zhou, Ismail, Y., Killpack, K.
Published in 2006 International Conference on Computer Design (01.10.2006)
Published in 2006 International Conference on Computer Design (01.10.2006)
Get full text
Conference Proceeding
Augmented simulation method for waveform propagation in delay calculation
Shebaita Ahmed, Le Jiayong, Wang Xin, Ding Li, Tehrani Peivand Fallah
Year of Publication 23.08.2016
Get full text
Year of Publication 23.08.2016
Patent
Lower power, lower delay design scheme for CMOS tapered buffers
Shebaita, A., Ismail, Y.
Published in 2009 4th International Design and Test Workshop (IDT) (01.11.2009)
Published in 2009 4th International Design and Test Workshop (IDT) (01.11.2009)
Get full text
Conference Proceeding
AUGMENTED SIMULATION METHOD FOR WAVEFORM PROPAGATION IN DELAY CALCULATION
WANG XIN, LE JIAYONG, SHEBAITA AHMED, DING LI, TEHRANI PEIVAND FALLAH
Year of Publication 10.03.2016
Get full text
Year of Publication 10.03.2016
Patent