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"SEWAKE, DEWANSHU CHHAGAN"
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"SEWAKE, DEWANSHU CHHAGAN"
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Fractional phase locked loop (PLL) with digital control driven by clock with higher frequency than PLL feedback signal
by
Ergun, Burcin Serter
,
Sewake
,
Dewanshu Chhagan
,
Puscar, Julian
,
Chen, Zhiqin
Year of Publication
19.09.2023
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FRACTIONAL PHASE LOCKED LOOP (PLL) WITH DIGITAL CONTROL DRIVEN BY CLOCK WITH HIGHER FREQUENCY THAN PLL FEEDBACK SIGNAL
by
PUSCAR, Julian
,
ERGUN, Burcin Serter
,
CHEN, Zhiqin
,
SEWAKE
,
Dewanshu Chhagan
Year of Publication
01.06.2023
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FRACTIONAL PHASE LOCKED LOOP (PLL) WITH DIGITAL CONTROL DRIVEN BY CLOCK WITH HIGHER FREQUENCY THAN PLL FEEDBACK SIGNAL
by
PUSCAR, Julian
,
ERGUN, Burcin Serter
,
CHEN, Zhiqin
,
SEWAKE
,
Dewanshu Chhagan
Year of Publication
01.06.2023
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Patent
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Fractional phase locked loop (PLL) with digital control driven by clock with higher frequency than PLL feedback signal
by
SEWAKE
,
DEWANSHU CHHAGAN
,
ERGUN, BURCIN SERTER
,
CHEN, ZHIQIN
,
PUSCAR, JULIAN
Year of Publication
16.06.2023
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Patent
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chemistry
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basic electronic circuitry
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electricity
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electric communication technique
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transmission of digital information, e.g. telegraphiccommunication
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demodulation or transference of modulation from one carrier toanother
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