Keeper-free integrated clock gate circuit
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Year of Publication 12.03.2024
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Year of Publication 12.03.2024
Patent
A low-jitter digital-to-time converter with look-ahead multi-phase DDS
Sahu, Harishankar, Paliwal, Pallavi, Yadav, Vivek, Gupta, Shalabh
Published in 2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS) (11.04.2016)
Published in 2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS) (11.04.2016)
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Conference Proceeding
KEEPER-FREE INTEGRATED CLOCK GATE CIRCUIT
Sahu, Harishankar, Chouksey, Abhishek, Shamanna, Gururaj K, Kumar, Naveen M, Rao, Madhusudan
Year of Publication 27.01.2022
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Year of Publication 27.01.2022
Patent
Low power clock gate circuit
Salaka, Jagadeesh Chandra, Sahu, Harishankar, Goyal, Mitesh, Nayak, Purna C, Shamanna, Gururaj, Sharma, Abhishek
Year of Publication 04.05.2021
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Year of Publication 04.05.2021
Patent
LOW POWER CLOCK GATE CIRCUIT
Sahu, Harishankar, Goyal, Mitesh, Nayak, Purna C, Shamanna, Gururaj, Salaka, Jagadeesh, Sharma, Abhishek
Year of Publication 04.03.2021
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Year of Publication 04.03.2021
Patent
LOW POWER CLOCK GATE CIRCUIT
GOYAL, Mitesh, NAYAK, Purna C, SHARMA, Abhishek, SALAKA, Jagadeesh Chandra, SAHU, Harishankar, SHAMANNA, Gururaj
Year of Publication 04.03.2021
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Year of Publication 04.03.2021
Patent
Low power clock gate circuit
NAYAK PUNA C, SALAKA JAGADISH CHANDRA, SARMANA, GURURAJ, SAHU, HARISHANKAR, SHARMA, ABHISHEK, GOYAL, MITESH
Year of Publication 11.03.2022
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Year of Publication 11.03.2022
Patent