Deceptive Logic Locking for Hardware Integrity Protection Against Machine Learning Attacks
Sisejkovic, Dominik, Merchant, Farhad, Reimann, Lennart M., Leupers, Rainer
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.06.2022)
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.06.2022)
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Journal Article
ANDROMEDA: An FPGA Based RISC-V MPSoC Exploration Framework
Merchant, Farhad, Sisejkovic, Dominik, Reimann, Lennart M., Yasotharan, Kirthihan, Grass, Thomas, Leupers, Rainer
Published in 2021 34th International Conference on VLSI Design and 2021 20th International Conference on Embedded Systems (VLSID) (01.02.2021)
Published in 2021 34th International Conference on VLSI Design and 2021 20th International Conference on Embedded Systems (VLSID) (01.02.2021)
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Conference Proceeding
ZuSE Ki-Avf: Application-Specific AI Processor for Intelligent Sensor Signal Processing in Autonomous Driving
Thieu, Gia Bao, Gesper, Sven, Paya-Vaya, Guillermo, Riggers, Christoph, Renke, Oliver, Fiedler, Till, Marten, Jakob, Stuckenberg, Tobias, Blume, Holger, Weis, Christian, Steinert, Lukas, Sudarshan, Chirag, Wehn, Norbert, Reimann, Lennart M., Leupers, Rainer, Beyer, Michael, Kohler, Daniel, Jauch, Alisa, Borrmann, Jan Micha, Jaberansari, Setareh, Berthold, Tim, Blawat, Meinolf, Kock, Markus, Schewior, Gregor, Benndorf, Jens, Kautz, Frederik, Bluethgen, Hans-Martin, Sauer, Christian
Published in 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE) (01.04.2023)
Published in 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE) (01.04.2023)
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Conference Proceeding
Automated Information Flow Analysis for Integrated Computing-in-Memory Modules
Reimann, Lennart M., Staudigl, Felix, Leupers, Rainer
Published in 2023 21st IEEE Interregional NEWCAS Conference (NEWCAS) (26.06.2023)
Published in 2023 21st IEEE Interregional NEWCAS Conference (NEWCAS) (26.06.2023)
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Conference Proceeding
Logic Locking at the Frontiers of Machine Learning: A Survey on Developments and Opportunities
Sisejkovic, Dominik, Reimann, Lennart M., Moussavi, Elmira, Merchant, Farhad, Leupers, Rainer
Published in 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC) (04.10.2021)
Published in 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC) (04.10.2021)
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Conference Proceeding
SoftFlow: Automated HW-SW Confidentiality Verification for Embedded Processors
Reimann, Lennart M., Wiesner, Jonathan, Sisejkovic, Dominik, Merchant, Farhad, Leupers, Rainer
Published in 2023 IFIP/IEEE 31st International Conference on Very Large Scale Integration (VLSI-SoC) (16.10.2023)
Published in 2023 IFIP/IEEE 31st International Conference on Very Large Scale Integration (VLSI-SoC) (16.10.2023)
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Conference Proceeding
QTFlow: Quantitative Timing-Sensitive Information Flow for Security-Aware Hardware Design on RTL
Reimann, Lennart M., Prashar, Anshul, Ghinami, Chiara, Pelke, Rebecca, Sisejkovic, Dominik, Merchant, Farhad, Leupers, Rainer
Published in 2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA) (22.04.2024)
Published in 2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA) (22.04.2024)
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Conference Proceeding
Quantitative Information Flow for Hardware: Advancing the Attack Landscape
Reimann, Lennart M, Erdönmez, Sarp, Sisejkovic, Dominik, Leupers, Rainer
Year of Publication 30.11.2022
Year of Publication 30.11.2022
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Journal Article
QTFlow: Quantitative Timing-Sensitive Information Flow for Security-Aware Hardware Design on RTL
Reimann, Lennart M, Prashar, Anshul, Ghinami, Chiara, Pelke, Rebecca, Sisejkovic, Dominik, Merchant, Farhad, Leupers, Rainer
Year of Publication 31.01.2024
Year of Publication 31.01.2024
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Journal Article
Exploiting the Lock: Leveraging MiG-V's Logic Locking for Secret-Data Extraction
Reimann, Lennart M, Yadu Madhukumar Variyar, Huelser, Lennet, Ghinami, Chiara, Germek, Dominik, Leupers, Rainer
Published in arXiv.org (09.08.2024)
Published in arXiv.org (09.08.2024)
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Paper
Journal Article
SoftFlow: Automated HW-SW Confidentiality Verification for Embedded Processors
Reimann, Lennart M, Wiesner, Jonathan, Sisejkovic, Dominik, Merchant, Farhad, Leupers, Rainer
Year of Publication 04.08.2023
Year of Publication 04.08.2023
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Journal Article
Deceptive Logic Locking for Hardware Integrity Protection against Machine Learning Attacks
Sisejkovic, Dominik, Merchant, Farhad, Reimann, Lennart M, Leupers, Rainer
Published in arXiv.org (19.07.2021)
Published in arXiv.org (19.07.2021)
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Paper
Journal Article
QFlow: Quantitative Information Flow for Security-Aware Hardware Design in Verilog
Reimann, Lennart M, Hanel, Luca, Sisejkovic, Dominik, Merchant, Farhad, Leupers, Rainer
Published in arXiv.org (22.12.2021)
Published in arXiv.org (22.12.2021)
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Paper
Journal Article
Logic Locking at the Frontiers of Machine Learning: A Survey on Developments and Opportunities
Sisejkovic, Dominik, Reimann, Lennart M, Moussavi, Elmira, Merchant, Farhad, Leupers, Rainer
Published in arXiv.org (23.11.2021)
Published in arXiv.org (23.11.2021)
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Paper
Journal Article
ANDROMEDA: An FPGA Based RISC-V MPSoC Exploration Framework
Merchant, Farhad, Sisejkovic, Dominik, Reimann, Lennart M, Yasotharan, Kirthihan, Grass, Thomas, Leupers, Rainer
Year of Publication 14.01.2021
Year of Publication 14.01.2021
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Journal Article
Challenging the Security of Logic Locking Schemes in the Era of Deep Learning: A Neuroevolutionary Approach
Sisejkovic, Dominik, Merchant, Farhad, Reimann, Lennart M, Srivastava, Harshit, Hallawa, Ahmed, Leupers, Rainer
Published in arXiv.org (30.11.2020)
Published in arXiv.org (30.11.2020)
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Journal Article