A 5-GS/s 158.6-mW 9.4-ENOB Passive-Sampling Time-Interleaved Three-Stage Pipelined-SAR ADC With Analog-Digital Corrections in 28-nm CMOS
Ramkaj, Athanasios T., Pena Ramos, Juan C., Pelgrom, Marcel J. M., Steyaert, Michiel S. J., Verhelst, Marian, Tavernier, Filip
Published in IEEE journal of solid-state circuits (01.06.2020)
Published in IEEE journal of solid-state circuits (01.06.2020)
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Journal Article
A 1024-Channel 268-nW/Pixel 36×36 μm2/Channel Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer Interfaces
Jang, Moonhyung, Hays, Maddy, Yu, Wei-Han, Lee, Changuk, Caragiulo, Pietro, Ramkaj, Athanasios T., Wang, Pingyu, Phillips, A. J., Vitale, Nicholas, Tandon, Pulkit, Yan, Pumiao, Mak, Pui-In, Chae, Youngcheol, Chichilnisky, E. J., Murmann, Boris, Muratore, Dante G.
Published in IEEE journal of solid-state circuits (01.04.2024)
Published in IEEE journal of solid-state circuits (01.04.2024)
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Journal Article
A 13.5-Gb/s 5-mV-Sensitivity 26.8-ps-CLK-OUT Delay Triple-Latch Feedforward Dynamic Comparator in 28-nm CMOS
Ramkaj, Athanasios T., Steyaert, Michiel S. J., Tavernier, Filip
Published in ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC) (01.09.2019)
Published in ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC) (01.09.2019)
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Conference Proceeding
A 1.25-GS/s 7-b SAR ADC With 36.4-dB SNDR at 5 GHz Using Switch-Bootstrapping, USPC DAC and Triple-Tail Comparator in 28-nm CMOS
Ramkaj, Athanasios T., Strackx, Maarten, Steyaert, Michiel S. J., Tavernier, Filip
Published in IEEE journal of solid-state circuits (01.07.2018)
Published in IEEE journal of solid-state circuits (01.07.2018)
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Journal Article
A 28 nm CMOS Triple-Latch Feed-Forward Dynamic Comparator With <27 ps / 1 V and <70 ps / 0.6 V Delay at 5 mV-Sensitivity
Ramkaj, Athanasios T., Pelgrom, Marcel J. M., Steyaert, Michiel S. J., Tavernier, Filip
Published in IEEE transactions on circuits and systems. I, Regular papers (01.11.2022)
Published in IEEE transactions on circuits and systems. I, Regular papers (01.11.2022)
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Journal Article
A 1024-Channel 268-nW/Pixel 36×36 μm 2 /Channel Data-Compressive Neural Recording IC for High-Bandwidth Brain–Computer Interfaces
Jang, Moonhyung, Hays, Maddy, Yu, Wei-Han, Lee, Changuk, Caragiulo, Pietro, Ramkaj, Athanasios T., Wang, Pingyu, Phillips, A. J., Vitale, Nicholas, Tandon, Pulkit, Yan, Pumiao, Mak, Pui-In, Chae, Youngcheol, Chichilnisky, E. J., Murmann, Boris, Muratore, Dante G.
Published in IEEE journal of solid-state circuits (01.04.2024)
Published in IEEE journal of solid-state circuits (01.04.2024)
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Journal Article