High sigma measurement of random threshold voltage variation in 14nm Logic FinFET technology
Giles, M. D., Arkali Radhakrishna, N., Becher, D., Kornfeld, A., Maurice, K., Mudanai, S., Natarajan, S., Newman, P., Packan, P., Rakshit, T.
Published in 2015 Symposium on VLSI Technology (VLSI Technology) (01.06.2015)
Published in 2015 Symposium on VLSI Technology (VLSI Technology) (01.06.2015)
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Journal Article
Novel Cell Architectures with Back-side Transistor Contacts for Scaling and Performance
Kobrinsky, M., Silva, J. D, Mannebach, E., Mills, S., Qader, M. Abd El, Adebayo, O., Radhakrishna, N. Arkali, Beasley, M., Chawla, J., Chugh, S., Dasgupta, A., Desai, U., Re, E. De, Dewey, G., Edwards, T., Engel, C., Gudmundsson, V., Hicks, J., Krist, B., Mehandru, R., Meric, I., Morrow, P., Nandi, D., Patel, P., Ramamurthy, R., Samanta, D., Shoer, L., Amour, A. St, Tan, L. H., Yemenicioglu, S., Wang, X., Ghani, T.
Published in 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) (11.06.2023)
Published in 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) (11.06.2023)
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Conference Proceeding
Process Innovations for Future Technology Nodes with Back-Side Power Delivery and 3D Device Stacking
Kobrinsky, M., Silva, J. D, Mannebach, E., Mills, S., El Qader, M. Abd, Adebayo, O., Radhakrishna, N. Arkali, Beasley, M., Chawla, J., Chugh, S., Clinton, E., Dasgupta, A., Desai, U., De Re, E., Dewey, G., Edwards, T., Engel, C., Galatage, R., Ghani, T., Gudmundsson, V., Hibbeler, L., Hicks, J., Krist, B., Mehandru, R., Meric, I., Morrow, P., Nandi, D., Pantuso, D., Patel, P., Pawashe, C., Radosavljevic, M., Ramamurthy, R., Samanta, D., Cekli, S., Shoer, L., Amour, A. St, Tan, L. H., Yemenicioglu, S., Wang, X., Wiedemer, J. A.
Published in 2023 International Electron Devices Meeting (IEDM) (09.12.2023)
Published in 2023 International Electron Devices Meeting (IEDM) (09.12.2023)
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