High yielding self-aligned contact process for a 0.150-μm DRAM technology
RUPP, Thomas S, DOBUZINSKY, David, ZHIJIAN LU, SARDESAI, Viraj Y, LIU, Hang-Yip, MALDEI, Michael, FALTERMEIER, John, GAMBINO, Jeff
Published in IEEE transactions on semiconductor manufacturing (01.05.2002)
Published in IEEE transactions on semiconductor manufacturing (01.05.2002)
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Journal Article
EMBEDDED VERTICAL DRAM CELLS AND DUAL WORKFUNCTION LOGIC GATES
GRUENING ULRIKE, DIVAKARUNI RAMA CHANDRA, RUPP THOMAS S, MANDELMAN JACK A
Year of Publication 05.06.2002
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Year of Publication 05.06.2002
Patent
VERTICAL DRAM CELL WITH WORDLINE SELF-ALIGNED TO STORAGE TRENCH
GRUENING ULRIKE, HORAK DAVID V, FURUKAWA TOSHIHARU, RUPP THOMAS S, RADENS CARL J, MANDELMAN JACK A
Year of Publication 15.06.2001
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Year of Publication 15.06.2001
Patent