METHOD OF DOPING IMPURITY IONS IN DUAL GATE AND METHOD OF FABRICATING THE DUAL GATE USING THE SAME
KIM, TAE KYUN, LEE, SEUNG MI, ROUH, KYOUNG BONG, JI, YUN HYUCK, KIM, WOO SUNG
Year of Publication 17.11.2010
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Year of Publication 17.11.2010
Patent
Integration of Low Resistive CVD-W Interconnects for sub-50nm FEOL application
Kim, Choon-Hwan, Rho, Il-Cheol, Rouh, Kyoung-Bong, Lim, Kwan-Yong, Kim, Yong-Soo, Ku, Ja-Chun, Sohn, Yong-Sun, Kang, Hyo-Sang, Kim, Hyeong-Joon
Published in 2008 International Interconnect Technology Conference (01.06.2008)
Published in 2008 International Interconnect Technology Conference (01.06.2008)
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