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"RICHARD G. HOFMANN"
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"RICHARD G. HOFMANN"
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Alferon and vulvar vestibulitis
by
Hofmann
,
Richard G
Published in
Journal of the American Medical Women's Association (1972)
(2003)
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Methods and apparatus for reducing transfer qualifier signaling on a two-channel bus
by
HOFMANN RICHARD G
,
SHIRLEN MARTYN R
,
SCHAFFER MARK M
Year of Publication
03.12.2013
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METHOD AND APPARATUS FOR DETECTING UNAUTHORIZED ACCESS TO A COMPUTING DEVICE AND SECURELY COMMUNICATING INFORMATION ABOUT SUCH UNAUTHORIZED ACCESS
by
SHIRLEN, MARTYN, R
,
HOFMANN
,
RICHARD
,
G
Year of Publication
12.01.2011
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METHOD AND APPARATUS FOR DETECTING UNAUTHORIZED ACCESS TO A COMPUTING DEVICE AND SECURELY COMMUNICATING INFORMATION ABOUT SUCH UNAUTHORIZED ACCESS
by
SHIRLEN, MARTYN, R
,
HOFMANN
,
RICHARD
,
G
Year of Publication
16.09.2010
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METHOD AND APPARATUS FOR DETECTING UNAUTHORIZED ACCESS TO A COMPUTING DEVICE AND SECURELY COMMUNICATING INFORMATION ABOUT SUCH UNAUTHORIZED ACCESS
by
SHIRLEN, MARTYN, R
,
HOFMANN
,
RICHARD
,
G
Year of Publication
17.09.2009
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METHODS AND APPARATUS FOR REDUCING TRANSFER QUALIFIER SIGNALING ON A TWO CHANNEL BUS
by
SHIRLEN, MARTYN R
,
HOFMANN
,
RICHARD G
,
SCHAFFER, MARK M
Year of Publication
01.03.2012
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Methods and Apparatus for Reducing Transfer Qualifier Signaling on a Two-Channel Bus
by
HOFMANN RICHARD G
,
SHIRLEN MARTYN R
,
SCHAFFER MARK M
Year of Publication
01.03.2012
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Scalable Bus Structure
by
HOFMANN RICHARD G
,
SCHAFFER MARK M
Year of Publication
19.04.2007
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System and method for adaptive run-time reconfiguration for a reconfigurable instruction set co-processor architecture
by
HOFMANN RICHARD G
,
ASAAD SAMEH W
Year of Publication
21.12.2006
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Scalable bus structure
by
HOFMANN RICHARD G
,
SCHAFFER MARK M
Year of Publication
07.09.2006
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Method and apparatus for allocating bandwidth on a transmit channel of a bus
by
HOFMANN RICHARD G
,
SCHAFFER MARK M
Year of Publication
22.06.2006
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Method and apparatus for transmitting memory pre-fetch commands on a bus
by
HOFMANN RICHARD G
,
SCHAFFER MARK M
Year of Publication
02.03.2006
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System and method for adaptive run-time reconfiguration for a reconfigurable instruction set co-processor architecture
by
HOFMANN RICHARD G
,
ASAAD SAMEH W
Year of Publication
05.01.2006
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Scalable bus structure
by
HOFMANN RICHARD G
,
SCHAFFER MARK M
Year of Publication
04.08.2005
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Efficient execution of memory barrier bus commands
by
SUBRAMANIAM GANASAN JAYA P
,
HOFMANN RICHARD G
,
SULLIVAN JAMES E.JR
Year of Publication
13.09.2007
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Weighted bus arbitration based on transfer direction and consumed bandwidth
by
SUBRAMANIAM GANASAN JAYA P
,
HOFMANN RICHARD G
,
SCHAFFER MARK M
Year of Publication
22.03.2007
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Using field programmable gate array (FPGA) technology with a microprocessor for reconfigurable, instruction level hardware acceleration
by
HERKERSDORF ANDREAS
,
DRAGONE SILVIO
,
HOFMANN RICHARD G
,
DOERING ANDREAS C
,
KUHLMANN CHARLES E
Year of Publication
13.10.2009
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Using field programmable gate array (FPGA) technology with a microprocessor for reconfigurable, instruction level hardware acceleration
by
Doering, Andreas C
,
Dragone, Silvio
,
Herkersdorf, Andreas
,
Hofmann
,
Richard G
,
Kuhlmann, Charles E
Year of Publication
13.10.2009
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Bus access arbitration scheme
by
SUBRAMANIAM GANASAN JAYA P
,
HOFMANN RICHARD G
,
LOHMAN TERENCE J
Year of Publication
07.09.2006
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System for using FPGA technology with a microprocessor for reconfigurable, instruction level hardware acceleration
by
Doering, Andreas C
,
Dragone, Silvio
,
Herkersdorf, Andreas
,
Hofmann
,
Richard G
,
Kuhlmann, Charles E
Year of Publication
01.09.2009
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