System Margining Surrogate-Based Optimization in Post-Silicon Validation
Rangel-Patino, Francisco Elias, Chavez-Hurtado, Jose Luis, Viveros-Wacher, Andres, Rayas-Sanchez, Jose Ernesto, Hakim, Nagib
Published in IEEE transactions on microwave theory and techniques (01.09.2017)
Published in IEEE transactions on microwave theory and techniques (01.09.2017)
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Journal Article
Post-Silicon Receiver Equalization Metamodeling by Artificial Neural Networks
Rangel-Patino, Francisco Elias, Rayas-Sanchez, Jose Ernesto, Viveros-Wacher, Andres, Chavez-Hurtado, Jose Luis, Vega-Ochoa, Edgar Andrei, Hakim, Nagib
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.04.2019)
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.04.2019)
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Journal Article
A Holistic Formulation for System Margining and Jitter Tolerance Optimization in Industrial Post-Silicon Validation
Rangel-Patino, Francisco Elias, Viveros-Wacher, Andres, Rayas-Sanchez, Jose Ernesto, Duron-Rosales, Ismael, Vega-Ochoa, Edgar Andrei, Hakim, Nagib, Lopez-Miralrio, Enrique
Published in IEEE transactions on emerging topics in computing (01.04.2020)
Published in IEEE transactions on emerging topics in computing (01.04.2020)
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Journal Article
Fast Jitter Tolerance Testing for High-Speed Serial Links in Post-Silicon Validation
Viveros-Wacher, Andres, Baca-Baylon, Ricardo, Rangel-Patino, Francisco E., Silva-Cortes, Johana L., Vega-Ochoa, Edgar A., Rayas-Sanchez, Jose E.
Published in IEEE transactions on electromagnetic compatibility (01.04.2022)
Published in IEEE transactions on electromagnetic compatibility (01.04.2022)
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Journal Article
A Multi-Stage CTLE Design and Optimization for PCI Express Gen6.0 Link Equalization
Lopez-Araiza, Karla G., Rangel-Patino, Francisco E., Ascencio-Blancarte, Jorge E., Vega-Ochoa, Edgar A., Rayas-Sanchez, Jose E., Longoria-Gandara, Omar
Published in 2023 IEEE Latin American Electron Devices Conference (LAEDC) (03.07.2023)
Published in 2023 IEEE Latin American Electron Devices Conference (LAEDC) (03.07.2023)
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Conference Proceeding
PCIe Gen5 Physical Layer Equalization Tuning by Using K-Means Clustering and Gaussian Process Regression Modeling in Industrial Post-Silicon Validation
Rangel-Patino, Francisco E., Viveros-Wacher, Andres, Rajyaguru, Chintan, Vega-Ochoa, Edgar A., Rodriguez-Saenz, Sofia D., Silva-Cortes, Johana L., Shival, Hemanth, Rayas-Sanchez, Jose E.
Published in 2023 IEEE MTT-S International Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization (NEMO) (28.06.2023)
Published in 2023 IEEE MTT-S International Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization (NEMO) (28.06.2023)
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Conference Proceeding
PCIe Gen6 Physical Layer Equalization Tuning by Using Unsupervised and Supervised Machine Learning Techniques
Rangel-Patino, Francisco E., Viveros-Wacher, Andres, Rodriguez-Saenz, Sofia D., Rayas-Sanchez, Jose E., Vega-Ochoa, Edgar A., Shival, Hemanth
Published in 2023 IEEE MTT-S Latin America Microwave Conference (LAMC) (06.12.2023)
Published in 2023 IEEE MTT-S Latin America Microwave Conference (LAMC) (06.12.2023)
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Conference Proceeding
Transmitter and Receiver Equalizers Optimization for PCI Express Gen6.0 based on PAM4
Ruiz-Urbina, Roberto J., Rangel-Patino, Francisco E., Rayas-Sanchez, Jose E., Vega-Ochoa, Edgar A., Longoria-Gandara, Omar H.
Published in 2020 IEEE MTT-S Latin America Microwave Conference (LAMC 2020) (26.05.2021)
Published in 2020 IEEE MTT-S Latin America Microwave Conference (LAMC 2020) (26.05.2021)
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Conference Proceeding
Machine Learning Techniques and Space Mapping Approaches to Enhance Signal and Power Integrity in High-Speed Links and Power Delivery Networks
Rayas-Sanchez, Jose E., Rangel-Patino, Francisco E., Mercado-Casillas, Benjamin, Leal-Romo, Felipe, Chavez-Hurtado, Jose L.
Published in 2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS) (01.02.2020)
Published in 2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS) (01.02.2020)
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Conference Proceeding
Transmitter and Receiver Equalizers Optimization Methodologies for High-Speed Links in Industrial Computer Platforms Post-Silicon Validation
Rangel-Patino, Francisco E., Rayas-Sanchez, Jose E., Hakim, Nagib
Published in 2018 IEEE International Test Conference (ITC) (01.10.2018)
Published in 2018 IEEE International Test Conference (ITC) (01.10.2018)
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Conference Proceeding
High-Speed Links Receiver Optimization in Post-Silicon Validation Exploiting Broyden-based Input Space Mapping
Rangel-Patino, Francisco E., Rayas-Sanchez, Jose E., Viveros-Wacher, Andres, Vega-Ochoa, Edgar A., Hakim, Nagib
Published in 2018 IEEE MTT-S International Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization (NEMO) (01.08.2018)
Published in 2018 IEEE MTT-S International Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization (NEMO) (01.08.2018)
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Conference Proceeding
A holistic methodology for system margining and jitter tolerance optimization in post-silicon validation
Rangel-Patino, Francisco E., Viveros-Wacher, Andres, Rayas-Sanchez, Jose E., Vega-Ochoa, Edgar A., Duron-Rosales, Ismael, Hakim, Nagib
Published in 2016 IEEE MTT-S Latin America Microwave Conference (LAMC) (01.12.2016)
Published in 2016 IEEE MTT-S Latin America Microwave Conference (LAMC) (01.12.2016)
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Conference Proceeding
Reconfigurable FIR filter coefficient optimization in post-silicon validation to improve eye diagram for optical interconnects
Duron-Rosales, Ismael, Rangel-Patino, Francisco E., Rayas-Sanchez, Jose E., Chavez-Hurtado, Jose L., Hakim, Nagib
Published in 2017 International Caribbean Conference on Devices, Circuits and Systems (ICCDCS) (01.06.2017)
Published in 2017 International Caribbean Conference on Devices, Circuits and Systems (ICCDCS) (01.06.2017)
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Conference Proceeding
Driving surface protrusion pattern detection for autonomous vehicles
Vega, Edgar Andrei, Camacho Perez, Jose Rodrigo, Cordourier Maruri, Hector, Rangel Patino, Francisco, Alvarez, Ignacio J, Zamora Esquivel, Julio, Viveros Wacher, Andres, Lopez Meyer, Paulo
Year of Publication 21.02.2023
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Year of Publication 21.02.2023
Patent
Jitter tolerance acceleration using the golden section optimization technique
Viveros-Wacher, Andres, Baca-Baylon, Ricardo, Rangel-Patino, Francisco E., Davalos-Santana, Miguel A., Vega-Ochoa, Edgar A., Rayas-Sanchez, Jose E.
Published in 2018 IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS) (01.02.2018)
Published in 2018 IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS) (01.02.2018)
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Conference Proceeding
DRIVING SURFACE PROTRUSION PATTERN DETECTION FOR AUTONOMOUS VEHICLES
RANGEL PATINO, Francisco, LOPEZ MEYER, Paulo, VEGA, Edgar Andrei, VIVEROS WACHER, Andres, CORDOURIER MARURI, Hector, ALVAREZ, Ignacio, ZAMORA ESQUIVEL, Julio, CAMACHO PEREZ, Jose Rodrigo
Year of Publication 29.09.2021
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Year of Publication 29.09.2021
Patent
DRIVING SURFACE PROTRUSION PATTERN DETECTION FOR AUTONOMOUS VEHICLES
Vega, Edgar Andrei, Cordourier Maruri, Hector, Rangel Patino, Francisco, Alvarez, Ignacio J, Zamora Esquivel, Julio, Camacho Perez, Jose, Viveros Wacher, Andres, Lopez Meyer, Paulo
Year of Publication 04.02.2021
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Year of Publication 04.02.2021
Patent
Backplane/FDA correlation-FDA replacing commercial backplanes for SoC ethernet electrical validation
Mendoza-Bonilla, Jesus-Andres, Cortez-Ibarra, Alejandro, Vega-Ochoa, Edgar-Andrei, Rangel-Patino, Francisco, Gore, Brandon
Published in 2014 22nd International Conference on Very Large Scale Integration (VLSI-SoC) (01.10.2014)
Published in 2014 22nd International Conference on Very Large Scale Integration (VLSI-SoC) (01.10.2014)
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Conference Proceeding