ENABLING PRODUCT SKUS BASED ON CHIPLET CONFIGURATIONS
Cheney, Lance, Teshome, Melaku, Koker, Altug, Matam, Naveen, Xavier, Binoj, Jahagirdar, Sanjeev, Finley, Eric, Mastronarde, Josh, George, Varghese, Striramassarma, Lakshminarayanan, Rajwani, Iqbal, Vemulapalli, Vikranth
Year of Publication 19.08.2021
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Year of Publication 19.08.2021
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Reducing aging of register file keeper circuits
Rajwani, Iqbal R, Fu, Wenyin, Thaploo, Anupama A, Koker, Altug, Ngo, Bee, Sinha, Kamal, Borole, Bhushan M, Appu, Abhishek R
Year of Publication 25.08.2020
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Year of Publication 25.08.2020
Patent
System, apparatus and method for segmenting a memory array
Rajwani, Iqbal R, Thaploo, Anupama A, Koker, Altug, Appu, Abhisek R, Borole, Bhushan M, Nekkanti, Sunil
Year of Publication 09.07.2019
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Year of Publication 09.07.2019
Patent
DISAGGREGATION OF SOC ARCHITECTURE
Cheney, Lance, Teshome, Melaku, Matam, Naveen, Koker, Altug, Xavier, Binoj, Jahagirdar, Sanjeev, Finley, Eric, Mastronarde, Josh, George, Varghese, Striramassarma, Lakshminarayanan, Rajwani, Iqbal, Vemulapalli, Vikranth
Year of Publication 06.05.2021
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Year of Publication 06.05.2021
Patent
Enabling product SKUs based on chiplet configurations
Cheney, Lance, Teshome, Melaku, Koker, Altug, Matam, Naveen, Xavier, Binoj, Jahagirdar, Sanjeev, Finley, Eric, Mastronarde, Josh, George, Varghese, Striramassarma, Lakshminarayanan, Rajwani, Iqbal, Vemulapalli, Vikranth
Year of Publication 02.02.2021
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Year of Publication 02.02.2021
Patent
LOW-POWER CLOCK GATE CIRCUIT
AGARWAL, Amit, HSU, Steven, REALOV, Simeon, KRISHNAMURTHY, Ram K, RAJWANI, Iqbal
Year of Publication 07.02.2019
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Year of Publication 07.02.2019
Patent
System, Apparatus And Method For Providing A Local Clock Signal For A Memory Array
Rajwani, Iqbal R, Fu, Wenyin, Koker, Altug, Thaploo, Anupama A, Sinha, Kamal, Borole, Bhushan M, Nekkanti, Sunil, Appu, Abhishek R
Year of Publication 16.01.2020
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Year of Publication 16.01.2020
Patent
System, Apparatus And Method For Segmenting A Memory Array
Rajwani, Iqbal R, Thaploo, Anupama A, Koker, Altug, Appu, Abhisek R, Borole, Bhushan M, Nekkanti, Sunil
Year of Publication 31.01.2019
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Year of Publication 31.01.2019
Patent
Shared keeper and footer flip-flop
Hsu, Steven K, Rajwani, Iqbal R, Agarwal, Amit, Realov, Simeon, Krishnamurthy, Ram K
Year of Publication 29.01.2019
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Year of Publication 29.01.2019
Patent
Integrated clock gate circuit with embedded NOR
Hsu, Steven K, Rajwani, Iqbal R, Agarwal, Amit, Realov, Simeon, Krishnamurthy, Ram K
Year of Publication 08.01.2019
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Year of Publication 08.01.2019
Patent
Disaggregation of SOC architecture
Cheney, Lance, Teshome, Melaku, Matam, Naveen, Koker, Altug, Xavier, Binoj, Jahagirdar, Sanjeev, Finley, Eric, Mastronarde, Josh, George, Varghese, Striramassarma, Lakshminarayanan, Rajwani, Iqbal, Vemulapalli, Vikranth
Year of Publication 13.10.2020
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Year of Publication 13.10.2020
Patent
ENABLING PRODUCT SKUS BASED ON CHIPLET CONFIGURATIONS
TESHOME, Melaku, XAVIER, Binoj, FINLEY, Eric, GEORGE, Varghese, JAHAGIRDAR, Sanjeev, MASTRONARDE, Josh, KOKER, Altug, CHENEY, Lance, VEMULAPALLI, Vikranth, STRIRAMASSARMA, Lakshminarayanan, MATAM, Naveen, RAJWANI, Iqbal
Year of Publication 24.09.2020
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Year of Publication 24.09.2020
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DISAGGREGATION OF SOC ARCHITECTURE
TESHOME, Melaku, XAVIER, Binoj, FINLEY, Eric, GEORGE, Varghese, JAHAGIRDAR, Sanjeev, MASTRONARDE, Josh, CHENEY, Lance, KOKER, Altug, VEMULAPALLI, Vikranth, STRIRAMASSARMA, Lakshminarayanan, MATAM, Naveen, RAJWANI, Iqbal
Year of Publication 24.09.2020
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Year of Publication 24.09.2020
Patent
DISAGGREGATION OF SOC ARCHITECTURE
Cheney, Lance, Teshome, Melaku, Matam, Naveen, Koker, Altug, Xavier, Binoj, Jahagirdar, Sanjeev, Finley, Eric, Mastronarde, Josh, George, Varghese, Striramassarma, Lakshminarayanan, Rajwani, Iqbal, Vemulapalli, Vikranth
Year of Publication 17.09.2020
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Year of Publication 17.09.2020
Patent
ENABLING PRODUCT SKUS BASED ON CHIPLET CONFIGURATIONS
Cheney, Lance, Teshome, Melaku, Koker, Altug, Matam, Naveen, Xavier, Binoj, Jahagirdar, Sanjeev, Finley, Eric, Mastronarde, Josh, George, Varghese, Striramassarma, Lakshminarayanan, Rajwani, Iqbal, Vemulapalli, Vikranth
Year of Publication 17.09.2020
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Year of Publication 17.09.2020
Patent
System, apparatus and method for providing a local clock signal for a memory array
Rajwani, Iqbal R, Fu, Wenyin, Koker, Altug, Thaploo, Anupama A, Sinha, Kamal, Borole, Bhushan M, Nekkanti, Sunil, Appu, Abhishek R
Year of Publication 10.09.2019
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Year of Publication 10.09.2019
Patent
System, apparatus and method for segmenting a memory array
Borole, Bhushan, Rajwani, Iqbal R, Thaploo, Anupama A, Koker, Altug, Appu, Abhisek R, Nekkanti, Sunil
Year of Publication 28.08.2018
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Year of Publication 28.08.2018
Patent
Reducing Aging of Register File Keeper Circuits
Rajwani, Iqbal R, Fu, Wenyin, Thaploo, Anupama A, Koker, Altug, Ngo, Bee, Sinha, Kamal, Borole, Bhushan M, Appu, Abhishek R
Year of Publication 11.07.2019
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Year of Publication 11.07.2019
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