13.5 A 512Gb 3-bit/Cell 3D Flash Memory on 128-Wordline-Layer with 132MB/s Write Performance Featuring Circuit-Under-Array Technology
Siau, Chang, Kim, Kwang-Ho, Lee, Seungpil, Isobe, Katsuaki, Shibata, Noboru, Verma, Kapil, Ariki, Takuya, Li, Jason, Yuh, Jong, Amarnath, Anirudh, Nguyen, Qui, Kwon, Ohwon, Jeong, Stanley, Li, Heguang, Hsu, Hua-Ling, Tseng, Tai-yuan, Choi, Steve, Darne, Siddhesh, Anantula, Pradeep, Yap, Alex, Chibvongodze, Hardwell, Miwa, Hitoshi, Yamashita, Minoru, Watanabe, Mitsuyuki, Hayashi, Koichiro, Kato, Yosuke, Miwa, Toru, Kang, Jang Yong, Okumura, Masatoshi, Ookuma, Naoki, Balaga, Muralikrishna, Ramachandra, Venky, Matsuda, Aki, Kulkani, Swaroop, Rachineni, Raghavendra, Manjunath, Pai K., Takehara, Masahito, Pai, Anil, Rajendra, Srinivas, Hisada, Toshiki, Fukuda, Ryo, Tokiwa, Naoya, Kawaguchi, Kazuaki, Yamaoka, Masashi, Komai, Hiromitsu, Minamoto, Takatoshi, Unno, Masaki, Ozawa, Susumu, Nakamura, Hiroshi, Hishida, Tomoo, Kajitani, Yasuyuki, Lin, Lei
Published in 2019 IEEE International Solid- State Circuits Conference - (ISSCC) (01.02.2019)
Published in 2019 IEEE International Solid- State Circuits Conference - (ISSCC) (01.02.2019)
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Conference Proceeding
A 512Gb 3b/Cell 3D flash memory on a 96-word-line-layer technology
Maejima, Hiroshi, Kanda, Kazushige, Fujimura, Susumu, Takagiwa, Teruo, Ozawa, Susumu, Sato, Jumpei, Shindo, Yoshihiko, Sato, Manabu, Kanagawa, Naoaki, Musha, Junji, Inoue, Satoshi, Sakurai, Katsuaki, Morozumi, Naohito, Fukuda, Ryo, Shimizu, Yuui, Hashimoto, Toshifumi, Xu Li, Shimizu, Yuuki, Abe, Kenichi, Yasufuku, Tadashi, Minamoto, Takatoshi, Yoshihara, Hiroshi, Yamashita, Takahiro, Satou, Kazuhiko, Sugimoto, Takahiro, Kono, Fumihiro, Abe, Mitsuhiro, Hashiguchi, Tomoharu, Kojima, Masatsugu, Suematsu, Yasuhiro, Shimizu, Takahiro, Imamoto, Akihiro, Kobayashi, Naoki, Miakashi, Makoto, Yamaguchi, Kouichirou, Bushnaq, Sanad, Haibi, Hicham, Ogawa, Masatsugu, Ochi, Yusuke, Kubota, Kenro, Wakui, Taichi, Dong He, Weihan Wang, Minagawa, Hiroe, Nishiuchi, Tomoko, Hao Nguyen, Kwang-Ho Kim, Ken Cheah, Yee Koh, Feng Lu, Ramachandra, Venky, Rajendra, Srinivas, Choi, Steve, Payak, Keyur, Raghunathan, Namas, Georgakis, Spiros, Sugawara, Hiroshi, Seungpil Lee, Futatsuyama, Takuya, Hosono, Koji, Shibata, Noboru, Hisada, Toshiki, Kaneko, Tetsuya, Nakamura, Hiroshi
Published in 2018 IEEE International Solid - State Circuits Conference - (ISSCC) (01.02.2018)
Published in 2018 IEEE International Solid - State Circuits Conference - (ISSCC) (01.02.2018)
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Conference Proceeding
30.4 A 1Tb 3b/Cell 3D-Flash Memory in a 170+ Word-Line-Layer Technology
Higuchi, Tsutomu, Kodama, Takuyo, Kato, Koji, Fukuda, Ryo, Tokiwa, Naoya, Abe, Mitsuhiro, Takagiwa, Teruo, Shimizu, Yuki, Musha, Junji, Sakurai, Katsuaki, Sato, Jumpei, Utsumi, Tetsuaki, Yoneya, Kazuhide, Suematsu, Yasuhiro, Hashimoto, Toshifumi, Hioka, Takeshi, Yanagidaira, Kosuke, Kojima, Masatsugu, Matsuno, Junya, Shiraishi, Kei, Yamamoto, Kensuke, Hayashi, Shintaro, Hashiguchi, Tomoharu, Inuzuka, Kazuko, Sugahara, Akio, Honma, Mitsuaki, Tsunoda, Keiji, Yamamoto, Kazumasa, Sugimoto, Takahiro, Fujimura, Tomofumi, Kaneko, Mizuki, Date, Hiroki, Kobayashi, Osamu, Minamoto, Takatoshi, Tachibana, Ryoichi, Yamaguchi, Itaru, Lee, Juan, Ramachandra, Venky, Rajendra, Srinivas, Tang, Tianyu, Darne, Siddhesh, Lee, Jiwang, Li, Jason, Miwa, Toru, Yamashita, Ryuji, Sugawara, Hiroshi, Ookuma, Naoki, Kano, Masahiro, Mizukoshi, Hiroyuki, Kuniyoshi, Yuki, Watanabe, Mitsuyuki, Akiyama, Kei, Mori, Hirotoshi, Arimizu, Akira, Katano, Yoshito, Ehama, Masakazu, Maejima, Hiroshi, Hosono, Koji, Yoshihara, Masahiro
Published in 2021 IEEE International Solid- State Circuits Conference (ISSCC) (13.02.2021)
Published in 2021 IEEE International Solid- State Circuits Conference (ISSCC) (13.02.2021)
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Conference Proceeding
Systems and methods of correcting errors in unmatched memory devices
Lee, Jang Woo, Rajendra, Srinivas, Pai, Anil, Ramachandra, Venkatesh Prasad
Year of Publication 24.09.2024
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Year of Publication 24.09.2024
Patent
Systems and methods of reducing detection error and duty error in memory devices
Lee, Jang Woo, Rajendra, Srinivas, Pai, Anil, Ramachandra, Venkatesh Prasad
Year of Publication 09.01.2024
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Year of Publication 09.01.2024
Patent
SYSTEMS AND METHODS OF CORRECTING ERRORS IN UNMATCHED MEMORY DEVICES
PAI, Anil, RAJENDRA, Srinivas, RAMACHANDRA, Venkatesh Prasad, LEE, Jang Woo
Year of Publication 30.11.2023
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Year of Publication 30.11.2023
Patent
SYSTEMS AND METHODS OF REDUCING DETECTION ERROR AND DUTY ERROR IN MEMORY DEVICES
Lee, Jang Woo, Rajendra, Srinivas, Pai, Anil, Ramachandra, Venkatesh Prasad
Year of Publication 30.11.2023
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Year of Publication 30.11.2023
Patent
Distributed grouped terminations for multiple memory integrated circuit systems
Contreras, John Thomas, Mobin, Sayed, Rajendra, Srinivas, Zakai, Rehan Ahmed
Year of Publication 27.09.2022
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Year of Publication 27.09.2022
Patent
DISTRIBUTED GROUPED TERMINATIONS FOR MULTIPLE MEMORY INTEGRATED CIRCUIT SYSTEMS
Contreras, John Thomas, Mobin, Sayed, Rajendra, Srinivas, Zakai, Rehan Ahmed
Year of Publication 30.12.2021
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Year of Publication 30.12.2021
Patent
Active low-power termination
Contreras, John Thomas, Rajendra, Srinivas, Zakai, Rehan Ahmed, Ramachandra, Venkatesh Prasad
Year of Publication 12.04.2022
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Year of Publication 12.04.2022
Patent
Active Low-Power Termination
CONTRERAS, John Thomas, RAJENDRA, Srinivas, RAMACHANDRA, Venkatesh Prasad, ZAKAI, Rehan Ahmed
Year of Publication 17.02.2022
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Year of Publication 17.02.2022
Patent
ACTIVE LOW-POWER TERMINATION
CONTRERAS, John Thomas, RAJENDRA, Srinivas, RAMACHANDRA, Venkatesh Prasad, ZAKAI, Rehan Ahmed
Year of Publication 17.02.2022
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Year of Publication 17.02.2022
Patent