Variation in Transistor Performance and Leakage in Nanometer-Scale Technologies
Saxena, S., Hess, C., Karbasi, H., Rossoni, A., Tonello, S., McNamara, P., Lucherini, S., Minehane, S., Dolainsky, C., Quarantelli, M.
Published in IEEE transactions on electron devices (01.01.2008)
Published in IEEE transactions on electron devices (01.01.2008)
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Journal Article
In-Product BTI Aging Sensor for Reliability Screening and Early Detection of Material at Risk
Brozek, Tomasz, Piadena, Alberto, Weiland, Larg, Quarantelli, Michele, Coccoli, Alberto, Saxena, Sharad, Hess, Christopher, Strojwas, Andrzej
Published in 2023 IEEE International Reliability Physics Symposium (IRPS) (01.03.2023)
Published in 2023 IEEE International Reliability Physics Symposium (IRPS) (01.03.2023)
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Conference Proceeding
Monitoring of wafer thinning induced in-die mechanical stress with embedded sensors for heterogeneous integration
Piadena, Alberto, Quarantelli, Michele, Brozek, Tomasz, Saxena, Sharad, Hess, Christopher, Weiland, Larg, Vallishayee, Rakesh, Yu, Yuan, Strojwas, Andrzej
Published in 2024 IEEE 74th Electronic Components and Technology Conference (ECTC) (28.05.2024)
Published in 2024 IEEE 74th Electronic Components and Technology Conference (ECTC) (28.05.2024)
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Conference Proceeding
Monitoring Product Chip Health with In-die Quality Monitors
Brozek, Tomasz, Piadena, Alberto, Quarantelli, Michele, Weiland, Larg, Hess, Christopher, Saxena, Sharad, Yu, Yuan, Vallishayee, Rakesh, Strojwas, Andrzej
Published in 2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM) (03.03.2024)
Published in 2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM) (03.03.2024)
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Conference Proceeding
Variation in Transistor Performance and Leakage in Nanometer-Scale Technologies : Device technologies and circuit techniques for power management
SAXENA, Sharad, HESS, Christopher, KARBASI, Hossein, ROSSONI, Angelo, TONELLO, Stefano, MCNAMARA, Patrick, LUCHERINI, Silvia, MINEHANE, Sean, DOLAINSKY, Christoph, QUARANTELLI, Michele
Published in IEEE transactions on electron devices (2008)
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Published in IEEE transactions on electron devices (2008)
Journal Article
Automatic Scaling Procedures for Analog Design Reuse
Savio, A., Colalongo, L., Quarantelli, M., Kovacs-Vajna, Z.M.
Published in IEEE transactions on circuits and systems. I, Regular papers (01.12.2006)
Published in IEEE transactions on circuits and systems. I, Regular papers (01.12.2006)
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Journal Article
Tracking in-die mechanical stress through silicon embedded sensors for advanced packaging applications
Saxena, Sharad, Hess, Christopher, Quarantelli, Michele, Piadena, Alberto, Weiland, Larg, Vallishayee, Rakesh, Yu, Yuan, Ciplickas, Dennis, Brozek, Tomasz, Strojwas, Andrzej
Published in 2022 IEEE 72nd Electronic Components and Technology Conference (ECTC) (01.05.2022)
Published in 2022 IEEE 72nd Electronic Components and Technology Conference (ECTC) (01.05.2022)
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Conference Proceeding
Robust design of low EMI susceptibility CMOS OpAmp
Richelli, A., Colalongo, L., Quarantelli, M., Kovacs-Vajna, Z.M.
Published in IEEE transactions on electromagnetic compatibility (01.05.2004)
Published in IEEE transactions on electromagnetic compatibility (01.05.2004)
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Journal Article
Device Array Scribe Characterization Vehicle Test Chip for Ultra Fast Product Wafer Variability Monitoring
Hess, C., Saxena, S., Karbasi, H., Subramanian, S., Quarantelli, M., Rossoni, A., Tonello, S., Sa Zhao, Slisher, D.
Published in 2007 IEEE International Conference on Microelectronic Test Structures (01.03.2007)
Published in 2007 IEEE International Conference on Microelectronic Test Structures (01.03.2007)
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Conference Proceeding
Analysis of the impact of process variations on clock skew
Zanella, S., Nardi, A., Neviani, A., Quarantelli, M., Saxena, S., Guardiani, C.
Published in IEEE transactions on semiconductor manufacturing (01.11.2000)
Published in IEEE transactions on semiconductor manufacturing (01.11.2000)
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Journal Article
Impact of unrealistic worst case modeling on the performance of VLSI circuits in deep submicron CMOS technologies
Nardi, A., Neviani, A., Zanoni, E., Quarantelli, M., Guardiani, C.
Published in IEEE transactions on semiconductor manufacturing (01.11.1999)
Published in IEEE transactions on semiconductor manufacturing (01.11.1999)
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Journal Article
Conference Proceeding
LAYOUT FOR DUT ARRAYS USED IN SEMICONDUCTOR WAFER TESTING
ROSSONI ANGELO, HESS CHRISTOPHER, TONELLO STEFANO, QUARANTELLI MICHELE, SQUICCIARINI MICHELE
Year of Publication 04.06.2009
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Year of Publication 04.06.2009
Patent
Layout for DUT arrays used in semiconductor wafer testing
ROSSONI ANGELO, HESS CHRISTOPHER, TONELLO STEFANO, QUARANTELLI MICHELE, SQUICCIARINI MICHELE
Year of Publication 10.02.2009
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Year of Publication 10.02.2009
Patent
Layout for DUT arrays used in semiconductor wafer testing
Hess, Christopher, Rossoni, Angelo, Tonello, Stefano, Squicciarini, Michele, Quarantelli, Michele
Year of Publication 10.02.2009
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Year of Publication 10.02.2009
Patent
LAYOUT FOR DUT ARRAY USED FOR SEMICONDUCTOR WAFER TEST
ROSSONI ANGELO, HESS CHRISTOPHER, TONELLO STEFANO, QUARANTELLI MICHELE, SQUICCIARINI MICHELE
Year of Publication 19.04.2007
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Year of Publication 19.04.2007
Patent
Layout for DUT arrays used in semiconductor wafer testing
ROSSONI ANGELO, HESS CHRISTOPHER, TONELLO STEFANO, QUARANTELLI MICHELE, SQUICCIARINI MICHELE
Year of Publication 05.04.2007
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Year of Publication 05.04.2007
Patent
Multiparameter time-domain sensitivity computation
Daldoss, L., Gubian, P., Quarantelli, M.
Published in IEEE transactions on circuits and systems. 1, Fundamental theory and applications (01.11.2001)
Published in IEEE transactions on circuits and systems. 1, Fundamental theory and applications (01.11.2001)
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Journal Article
Sensing circuit for memory cells
Pasotti, Marco, De Sandre, Guido, Guaitini, Giovanni, Iezzi, David, Poles, Marco, Quarantelli, Michele, Rolandi, Pier Luigi
Year of Publication 18.03.2003
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Year of Publication 18.03.2003
Patent