Real-Time Low-Power FPGA Architecture for Stereo Vision
Puglia, Luca, Vigliar, Mario, Raiconi, Giancarlo
Published in IEEE transactions on circuits and systems. II, Express briefs (01.11.2017)
Published in IEEE transactions on circuits and systems. II, Express briefs (01.11.2017)
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Journal Article
A low-cost open-architecture taste delivery system for gustatory fMRI and BCI experiments
Canna, Antonietta, Prinster, Anna, Fratello, Michele, Puglia, Luca, Magliulo, Mario, Cantone, Elena, Pirozzi, Maria Agnese, Di Salle, Francesco, Esposito, Fabrizio
Published in Journal of neuroscience methods (01.01.2019)
Published in Journal of neuroscience methods (01.01.2019)
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Journal Article
Passive dense stereo vision on the Myriad2 VPU
Puglia, Luca, Ionica, Mircea, Raiconi, Giancarlo, Moloney, David
Published in 2016 IEEE Hot Chips 28 Symposium (HCS) (01.08.2016)
Published in 2016 IEEE Hot Chips 28 Symposium (HCS) (01.08.2016)
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Conference Proceeding
SASCr2: Enhanced hardware string alignment coprocessor for stereo correspondence
Vigliar, Mario, Puglia, Luca, Fratello, Michele, Raiconi, Giancarlo
Published in 2014 3rd Mediterranean Conference on Embedded Computing (MECO) (01.06.2014)
Published in 2014 3rd Mediterranean Conference on Embedded Computing (MECO) (01.06.2014)
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Conference Proceeding
SASC: A hardware string alignment coprocessor for stereo correspondence
Vigliar, M., Fratello, M., Puglia, L., Raiconi, G.
Published in 2012 IEEE International Conference on Electronics Design, Systems and Applications (ICEDSA) (01.11.2012)
Published in 2012 IEEE International Conference on Electronics Design, Systems and Applications (ICEDSA) (01.11.2012)
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Conference Proceeding