Design of an 8:1 MUX at 1.7 Gbit/s in 0.8 /spl mu/m CMOS technology
Navarro, J., Van Noije, W.A.M.
Published in Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) (1998)
Published in Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) (1998)
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Conference Proceeding
spl beta/-driven threshold elements
Varshavsky, V.I.
Published in Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) (1998)
Published in Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) (1998)
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Conference Proceeding
Issues in the design of domino logic circuits
Srivastava, P., Pua, A., Welch, L.
Published in Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) (1998)
Published in Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) (1998)
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Conference Proceeding
An efficient residue to weighted converter for a new residue number system
Skavantzos, A.
Published in Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) (1998)
Published in Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) (1998)
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Conference Proceeding
A new full adder cell for low-power applications
Shams, A.M., Bayoumi, M.A.
Published in Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) (1998)
Published in Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) (1998)
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Conference Proceeding
On the characterization of multi-point nets in electronic designs
Stroobandt, D., Kurdahi, F.J.
Published in Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) (1998)
Published in Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) (1998)
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Conference Proceeding
A combined interval and floating point multiplier
Stine, J.E., Schulte, M.J.
Published in Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) (1998)
Published in Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) (1998)
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Conference Proceeding
Linear transformations and exact minimization of BDDs
Gunther, W., Drechsler, R.
Published in Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) (1998)
Published in Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) (1998)
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Conference Proceeding
A VLSI high-performance encoder with priority lookahead
Delgado-Frias, J.G., Nyathi, J.
Published in Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) (1998)
Published in Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) (1998)
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Conference Proceeding
Identifying high-level components in combinational circuits
Doom, T., White, J., Wojcik, A., Chisholm, G.
Published in Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) (1998)
Published in Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) (1998)
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Conference Proceeding
Design of clock distribution networks in presence of process variations
Nekili, M., Savaria, Y., Bois, G.
Published in Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) (1998)
Published in Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222) (1998)
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Conference Proceeding