Memory Efficient Implementation of Two Graph Based Circuit Simulator for PDE-Electrical Analogy
Save, Y. D., Narayanan, H., Patkar, S. B.
Published in 2013 26th International Conference on VLSI Design and 2013 12th International Conference on Embedded Systems (01.01.2013)
Published in 2013 26th International Conference on VLSI Design and 2013 12th International Conference on Embedded Systems (01.01.2013)
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Conference Proceeding
Journal Article
Two Graph Based Circuit Simulator for PDE-Electrical Analogy
Save, Y. D., Narayanan, H., Patkar, S. B.
Published in 2012 25th International Conference on VLSI Design (01.01.2012)
Published in 2012 25th International Conference on VLSI Design (01.01.2012)
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Conference Proceeding
An efficient practical heuristic for good ratio-cut partitioning
Patkar, S.B., Narayanan, H.
Published in 16th International Conference on VLSI Design, 2003. Proceedings (2003)
Published in 16th International Conference on VLSI Design, 2003. Proceedings (2003)
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Conference Proceeding