Memory allocation and mapping in high-level synthesis - an integrated approach
Jaewon Seo, Taewhan Kim, Panda, P.R.
Published in IEEE transactions on very large scale integration (VLSI) systems (01.10.2003)
Published in IEEE transactions on very large scale integration (VLSI) systems (01.10.2003)
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Journal Article
Low-power memory mapping through reducing address bus activity
Panda, P.R., Dutt, N.D.
Published in IEEE transactions on very large scale integration (VLSI) systems (01.09.1999)
Published in IEEE transactions on very large scale integration (VLSI) systems (01.09.1999)
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Journal Article
Front-End Design Flows for Systems on Chip: An Embedded Tutorial
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Conference Proceeding
Online cache state dumping for processor debug
Vishnoi, Anant, Panda, Preeti Ranjan, Balakrishnan, M.
Published in 2009 46th ACM/IEEE Design Automation Conference (26.07.2009)
Published in 2009 46th ACM/IEEE Design Automation Conference (26.07.2009)
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Conference Proceeding
Cache aware compression for processor debug support
Vishnoi, A., Panda, P.R., Balakrishnan, M.
Published in 2009 Design, Automation & Test in Europe Conference & Exhibition (01.04.2009)
Published in 2009 Design, Automation & Test in Europe Conference & Exhibition (01.04.2009)
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Conference Proceeding
A generic platform for estimation of multi-threaded program performance on heterogeneous multiprocessors
Sahu, A., Balakrishnan, M., Panda, P.R.
Published in 2009 Design, Automation & Test in Europe Conference & Exhibition (01.04.2009)
Published in 2009 Design, Automation & Test in Europe Conference & Exhibition (01.04.2009)
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Conference Proceeding
Augmenting loop tiling with data alignment for improved cache performance
Panda, P.R., Nakamura, H., Dutt, N.D., Nicolau, A.
Published in IEEE transactions on computers (01.02.1999)
Published in IEEE transactions on computers (01.02.1999)
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Journal Article
Local memory exploration and optimization in embedded systems
Panda, P.R., Dutt, N.D., Nicolau, A.
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.01.1999)
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.01.1999)
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Journal Article
Conference Proceeding
Rapid estimation of control delay from high-level specifications
Gupta, Gagan Raj, Gupta, Madhur, Panda, Preeti Ranjan
Published in 2006 43rd ACM/IEEE Design Automation Conference (24.07.2006)
Published in 2006 43rd ACM/IEEE Design Automation Conference (24.07.2006)
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Conference Proceeding
Memory bank customization and assignment in behavioral synthesis
Panda, P.R.
Published in 1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051) (1999)
Published in 1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051) (1999)
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Conference Proceeding
Journal Article
Evaluation of Bus Based Interconnect Mechanisms in Clustered VLIW Architectures
Gangwar, Anup, Balakrishnan, M., Panda, Preeti R., Kumar, Anshul
Published in Design, Automation and Test in Europe (07.03.2005)
Published in Design, Automation and Test in Europe (07.03.2005)
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Conference Proceeding
Specification and design of multi-million gate SOCs
Chandra, R., Henkel, J., Panda, P.R., Parameswaran, S., Ramachandran, L.
Published in 16th International Conference on VLSI Design, 2003. Proceedings (2003)
Published in 16th International Conference on VLSI Design, 2003. Proceedings (2003)
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Conference Proceeding
SystemC: a modeling platform supporting multiple design abstractions
Panda, Preeti Ranjan
Published in International Symposium on System Synthesis (IEEE Cat. No.01EX526) (30.09.2001)
Published in International Symposium on System Synthesis (IEEE Cat. No.01EX526) (30.09.2001)
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Conference Proceeding
Low power mapping of behavioral arrays to multiple memories
Panda, P.R., Dutt, N.D.
Published in Proceedings of 1996 International Symposium on Low Power Electronics and Design (1996)
Published in Proceedings of 1996 International Symposium on Low Power Electronics and Design (1996)
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Conference Proceeding
Behavioral array mapping into multiport memories targeting low power
Panda, P.R., Dutt, N.D.
Published in Proceedings Tenth International Conference on VLSI Design (1997)
Published in Proceedings Tenth International Conference on VLSI Design (1997)
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Conference Proceeding
1995 high level synthesis design repository
Panda, P.R., Dutt, N.D.
Published in Proceedings of the Eighth International Symposium on System Synthesis (1995)
Published in Proceedings of the Eighth International Symposium on System Synthesis (1995)
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Conference Proceeding