OuterSPACE: An Outer Product Based Sparse Matrix Multiplication Accelerator
Pal, Subhankar, Beaumont, Jonathan, Park, Dong-Hyeon, Amarnath, Aporva, Feng, Siying, Chakrabarti, Chaitali, Kim, Hun-Seok, Blaauw, David, Mudge, Trevor, Dreslinski, Ronald
Published in 2018 IEEE International Symposium on High Performance Computer Architecture (HPCA) (01.02.2018)
Published in 2018 IEEE International Symposium on High Performance Computer Architecture (HPCA) (01.02.2018)
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Conference Proceeding
Versa: A 36-Core Systolic Multiprocessor With Dynamically Reconfigurable Interconnect and Memory
Kim, Sung, Fayazi, Morteza, Daftardar, Alhad, Chen, Kuan-Yu, Tan, Jielun, Pal, Subhankar, Ajayi, Tutu, Xiong, Yan, Mudge, Trevor, Chakrabarti, Chaitali, Blaauw, David, Dreslinski, Ronald, Kim, Hun-Seok
Published in IEEE journal of solid-state circuits (01.04.2022)
Published in IEEE journal of solid-state circuits (01.04.2022)
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Journal Article
Dramaton: A Near-DRAM Accelerator for Large Number Theoretic Transforms
Park, Yongmo, Pal, Subhankar, Amarnath, Aporva, Swaminathan, Karthik, Lu, Wei D., Buyuktosunoglu, Alper, Bose, Pradip
Published in IEEE computer architecture letters (01.01.2024)
Published in IEEE computer architecture letters (01.01.2024)
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Journal Article
A 7.3 M Output Non-Zeros/J, 11.7 M Output Non-Zeros/GB Reconfigurable Sparse Matrix-Matrix Multiplication Accelerator
Park, Dong-Hyeon, Pal, Subhankar, Feng, Siying, Gao, Paul, Tan, Jielun, Rovinski, Austin, Xie, Shaolin, Zhao, Chun, Amarnath, Aporva, Wesley, Timothy, Beaumont, Jonathan, Chen, Kuan-Yu, Chakrabarti, Chaitali, Taylor, Michael Bedford, Mudge, Trevor, Blaauw, David, Kim, Hun-Seok, Dreslinski, Ronald G.
Published in IEEE journal of solid-state circuits (01.04.2020)
Published in IEEE journal of solid-state circuits (01.04.2020)
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Journal Article
CoSPARSE: A Software and Hardware Reconfigurable SpMV Framework for Graph Analytics
Feng, Siying, Sun, Jiawen, Pal, Subhankar, He, Xin, Kaszyk, Kuba, Park, Dong-hyeon, Morton, Magnus, Mudge, Trevor, Cole, Murray, O'Boyle, Michael, Chakrabarti, Chaitali, Dreslinski, Ronald
Published in 2021 58th ACM/IEEE Design Automation Conference (DAC) (05.12.2021)
Published in 2021 58th ACM/IEEE Design Automation Conference (DAC) (05.12.2021)
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Conference Proceeding
프로세서의 필터링된 분기 예측 구조
YALAVARTI ADITHYA, PAL SUBHANKAR, KALAMATIANOS JOHN, AGRAWAL VARUN, SRINIVASAN VINESH
Year of Publication 31.03.2021
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Year of Publication 31.03.2021
Patent
Heterogeneity-Aware Scheduling on SoCs for Autonomous Vehicles
Amarnath, Aporva, Pal, Subhankar, Kassa, Hiwot Tadese, Vega, Augusto, Buyuktosunoglu, Alper, Franke, Hubertus, Wellman, John-David, Dreslinski, Ronald, Bose, Pradip
Published in IEEE computer architecture letters (01.07.2021)
Published in IEEE computer architecture letters (01.07.2021)
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Journal Article
R2D3: A Reliability Engine for 3D Parallel Systems
Bagherzadeh, Javad, Amarnath, Aporva, Tan, Jielun, Pal, Subhankar, Dreslinski, Ronald G.
Published in 2020 57th ACM/IEEE Design Automation Conference (DAC) (01.07.2020)
Published in 2020 57th ACM/IEEE Design Automation Conference (DAC) (01.07.2020)
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Conference Proceeding
A carbon nanotube transistor based RISC-V processor using pass transistor logic
Amarnath, Aporva, Siying Feng, Pal, Subhankar, Ajayi, Tutu, Rovinski, Austin, Dreslinski, Ronald G.
Published in 2017 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED) (01.07.2017)
Published in 2017 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED) (01.07.2017)
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Conference Proceeding
A 7.3 M Output Non-Zeros/J Sparse Matrix-Matrix Multiplication Accelerator using Memory Reconfiguration in 40 nm
Pal, Subhankar, Park, Dong-hyeon, Feng, Siying, Gao, Paul, Tan, Jielun, Rovinski, Austin, Xie, Shaolin, Zhao, Chun, Amarnath, Aporva, Wesley, Timothy, Beaumont, Jonathan, Chen, Kuan-Yu, Chakrabarti, Chaitali, Taylor, Michael, Mudge, Trevor, Blaauw, David, Kim, Hun-Seok, Dreslinski, Ronald
Published in 2019 Symposium on VLSI Circuits (01.06.2019)
Published in 2019 Symposium on VLSI Circuits (01.06.2019)
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Conference Proceeding
A 7.3 M Output Non-Zeros/J Sparse Matrix-Matrix Multiplication Accelerator using Memory Reconfiguration in 40 nm
Pal, Subhankar, Park, Dong-hyeon, Feng, Siying, Gao, Paul, Tan, Jielun, Rovinski, Austin, Xie, Shaolin, Zhao, Chun, Amarnath, Aporva, Wesley, Timothy, Beaumont, Jonathan, Chen, Kuan-Yu, Chakrabarti, Chaitali, Taylor, Michael, Mudge, Trevor, Blaauw, David, Kim, Hun-Seok, Dreslinski, Ronald
Published in 2019 Symposium on VLSI Technology (01.06.2019)
Published in 2019 Symposium on VLSI Technology (01.06.2019)
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Conference Proceeding
Accelerating Graph Analytics on a Reconfigurable Architecture with a Data-Indirect Prefetcher
Yang, Yichen, Li, Jingtao, Talati, Nishil, Pal, Subhankar, Feng, Siying, Chakrabarti, Chaitali, Mudge, Trevor, Dreslinski, Ronald
Published in arXiv.org (29.01.2023)
Published in arXiv.org (29.01.2023)
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Paper
Journal Article
Efficient Management of Scratch-Pad Memories in Deep Learning Accelerators
Pal, Subhankar, Venkataramani, Swagath, Srinivasan, Viji, Gopalakrishnan, Kailash
Published in 2021 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS) (01.03.2021)
Published in 2021 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS) (01.03.2021)
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Conference Proceeding
xURLCC in 6g with meshed RAN
Mohammad Ali Khoshkholghi, Mahmoodi, Toktam, Pal, Subhankar, Chopra, Subhash, Tendulkar, Mayuri, Sarkar, Sandip
Published in arXiv.org (19.01.2023)
Published in arXiv.org (19.01.2023)
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Paper
Journal Article
HE-PEx: Efficient Machine Learning under Homomorphic Encryption using Pruning, Permutation and Expansion
Aharoni, Ehud, Moran, Baruch, Bose, Pradip, Alper Buyuktosunoglu, Drucker, Nir, Pal, Subhankar, Pelleg, Tomer, Sarpatwar, Kanthi, Shaul, Hayim, Soceanu, Omri, Vaculin, Roman
Published in arXiv.org (07.07.2022)
Published in arXiv.org (07.07.2022)
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Paper
Journal Article
Branch target filtering based on memory region access count
Kalamatianos, John, Yalavarti, Adithya, Agrawal, Varun, Srinivasan, Vinesh, Pal, Subhankar
Year of Publication 10.01.2023
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Year of Publication 10.01.2023
Patent
HetSched: Quality-of-Mission Aware Scheduling for Autonomous Vehicle SoCs
Aporva Amarnath, Pal, Subhankar, Kassa, Hiwot, Vega, Augusto, Alper Buyuktosunoglu, Franke, Hubertus, John-David Wellman, Dreslinski, Ronald, Bose, Pradip
Published in arXiv.org (25.03.2022)
Published in arXiv.org (25.03.2022)
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Paper
Journal Article