Cycling endurance optimization scheme for 1Mb STT-MRAM in 40nm technology
Hung-Chang Yu, Kai-Chun Lin, Ku-Feng Lin, Chin-Yi Huang, Yu-Der Chih, Tong-Chern Ong, Chang, J., Natarajan, S., Tran, L. C.
Published in 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers (01.02.2013)
Published in 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers (01.02.2013)
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Conference Proceeding
Low-side driver's failure mechanism in a class-D amplifier under short circuit test and a robust driver device
Jian-Hsing Lee, Shih, J R, Tong-Chern Ong, Wu, Kenneth
Published in 2010 IEEE International Reliability Physics Symposium (01.05.2010)
Published in 2010 IEEE International Reliability Physics Symposium (01.05.2010)
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Conference Proceeding
A 22nm 96KX144 RRAM Macro with a Self-Tracking Reference and a Low Ripple Charge Pump to Achieve a Configurable Read Window and a Wide Operating Voltage Range
Chou, Chung-Cheng, Lin, Zheng-Jun, Lai, Chien-An, Su, Chin-I, Tseng, Pei-Ling, Chen, Wei-Chi, Tsai, Wu-Chin, Chu, Wen-Ting, Ong, Tong-Chern, Chuang, Harry, Chih, Yu-Der, Chang, Tsung-Yung Jonathan
Published in 2020 IEEE Symposium on VLSI Circuits (01.06.2020)
Published in 2020 IEEE Symposium on VLSI Circuits (01.06.2020)
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Conference Proceeding
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
TU KUO CHI, ONG TONG CHERN, SHIH SHENG HUNG, YANG JEN SHENG, CHU WEN TING
Year of Publication 07.06.2018
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Year of Publication 07.06.2018
Patent
Logic Process Compatible 40nm 256K×144 Embedded RRAM with Low Voltage Current Limiter and Ambient Compensation Scheme to Improve the Read Window
Lai, Chien-An, Chou, Chung-Cheng, Weng, Chi-Hsiang, Lin, Zheng-Jun, Tseng, Pei-Ling, Wang, Chien-Fan, Wang, Chih-Chen, Su, Chin-I, Chen, Wei-Chi, Lin, Yu-Cheng, Ong, Tong-Chern, Chang, Chi, Chih, Yu-Der, Chang, Tsung-Yung
Published in 2018 IEEE Asian Solid-State Circuits Conference (A-SSCC) (01.11.2018)
Published in 2018 IEEE Asian Solid-State Circuits Conference (A-SSCC) (01.11.2018)
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Conference Proceeding
50-Å gate-Oxide MOSFET's at 77 K
Tong-Chern Ong, Ko, P.K., Chenming Hu
Published in IEEE transactions on electron devices (01.10.1987)
Published in IEEE transactions on electron devices (01.10.1987)
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Journal Article
A novel program disturb mechanism through erase gate in a 110nm sidewall split-gate Flash memory cell
Hsin-Heng Wang, Chih-Wei Hung, Hui-Hung Kuo, Yang, T, Huang, J, Hwang, C J, Yung-Tao Lin, Tong-Chern Ong, Tran, L C
Published in Proceedings of 2011 International Symposium on VLSI Technology, Systems and Applications (01.04.2011)
Published in Proceedings of 2011 International Symposium on VLSI Technology, Systems and Applications (01.04.2011)
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Conference Proceeding
Recovery of threshold voltage after hot-carrier stressing
Ong, T.-C., Levi, M., Ko, P.-K., Hu, C.
Published in IEEE transactions on electron devices (01.07.1988)
Published in IEEE transactions on electron devices (01.07.1988)
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Journal Article
The positive trigger voltage lowering effect for latch-up
LEE, Jian-Hsing, WENG, Wu-Te, SHIH, Jiaw-Ren, YU, Kuo-Feng, ONG, Tong-Chern
Published in Proceedings of the 11th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2004 (IEEE Cat. No.04TH8743) (2004)
Published in Proceedings of the 11th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2004 (IEEE Cat. No.04TH8743) (2004)
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