High bandwidth memory(HBM) with TSV technique
Jong Chern Lee, Jihwan Kim, Kyung Whan Kim, Young Jun Ku, Dae Suk Kim, Chunseok Jeong, Tae Sik Yun, Hongjung Kim, Ho Sung Cho, Sangmuk Oh, Hyun Sung Lee, Ki Hun Kwon, Dong Beom Lee, Young Jae Choi, Jaejin Lee, Hyeon Gon Kim, Jun Hyun Chun, Jonghoon Oh, Seok Hee Lee
Published in 2016 International SoC Design Conference (ISOCC) (01.10.2016)
Published in 2016 International SoC Design Conference (ISOCC) (01.10.2016)
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Conference Proceeding
A 192-Gb 12-High 896-GB/s HBM3 DRAM With a TSV Auto-Calibration Scheme and Machine-Learning-Based Layout Optimization
Park, Myeong-Jae, Lee, Jinhyung, Cho, Kyungjun, Park, Jihwan, Moon, Junil, Lee, Sung-Hak, Kim, Tae-Kyun, Oh, Sanghoon, Choi, Seokwoo, Choi, Yongsuk, Cho, Ho Sung, Yun, Taesik, Koo, Young Jun, Lee, Jae-Seung, Yoon, Byung-Kuk, Park, Young-Jun, Oh, Sangmuk, Lee, Chang Kwon, Lee, Seong-Hee, Kim, Hyun-Woo, Ju, Yucheon, Lim, Seung-Kyun, Lee, Kyo Yun, Lee, Sang-Hoon, We, Woo Sung, Kim, Seungchan, Yang, Seung Min, Lee, Keonho, Kim, In-Keun, Jeon, Younghyun, Park, Jae-Hyung, Yun, Jong Chan, Kim, Seonyeol, Lee, Dong-Yeol, Oh, Su-Hyun, Shin, Jung-Hyun, Lee, Yeonho, Jang, Jieun, Cho, Joohwan
Published in IEEE journal of solid-state circuits (01.01.2023)
Published in IEEE journal of solid-state circuits (01.01.2023)
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Journal Article
13.4 A 48GB 16-High 1280GB/s HBM3E DRAM with All-Around Power TSV and a 6-Phase RDQS Scheme for TSV Area Optimization
Lee, Jinhyung, Cho, Kyungjun, Lee, Chang Kwon, Lee, Yeonho, Park, Jae-Hyung, Oh, Su-Hyun, Ju, Yucheon, Jeong, Chunseok, Cho, Ho Sung, Lee, Jaeseung, Yun, Tae-Sik, Cho, Jin Hee, Oh, Sangmuk, Moon, Junil, Park, Young-Jun, Choi, Hong-Seok, Kim, In-Keun, Yang, Seung Min, Kim, Sun-Yeol, Jang, Jaemin, Kim, Jinwook, Lee, Seong-Hee, Jeon, Younghyun, Park, Juhyung, Kim, Tae-Kyun, Ka, Dongyoon, Oh, Sanghoon, Kim, Jinse, Jeon, Junyeol, Kim, Seonhong, Kim, Kyeong Tae, Kim, Taeho, Yang, Hyeonjin, Yang, Dongju, Lee, Minseop, Song, Heewoong, Jang, Dongwook, Shin, Junghyun, Kim, Hyunsik, Baek, Changki, Jeong, Hajun, Yoon, Jongchan, Lim, Seung-Kyun, Lee, Kyo Yun, Koo, Young Jun, Park, Myeong-Jae, Cho, Joohwan, Kim, Jonghwan
Published in 2024 IEEE International Solid-State Circuits Conference (ISSCC) (18.02.2024)
Published in 2024 IEEE International Solid-State Circuits Conference (ISSCC) (18.02.2024)
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Conference Proceeding
22.3 A 128Gb 8-High 512GB/s HBM2E DRAM with a Pseudo Quarter Bank Structure, Power Dispersion and an Instruction-Based At-Speed PMBIST
Lee, Dong Uk, Cho, Ho Sung, Kim, Jihwan, Ku, Young Jun, Oh, Sangmuk, Dae Kim, Chul, Kim, Hyun Woo, Lee, Woo Young, Kim, Tae Kyun, Yun, Tae Sik, Kim, Min Jeong, Lim, SeungGyeon, Lee, Seong Hee, Yun, Byung Kuk, Moon, Jun Il, Park, Ji Hwan, Choi, Seokwoo, Park, Young Jun, Lee, Chang Kwon, Jeong, Chunseok, Lee, Jae-Seung, Lee, Sang Hun, We, Woo Sung, Yun, Jong Chan, Lee, Doobock, Shin, Junghyun, Kim, Seungchan, Lee, Junghwan, Choi, Jiho, Ju, Yucheon, Park, Myeong-Jae, Lee, Kang Seol, Hur, Youngdo, Shim, Daeyong, Lee, Sangkwon, Chun, Junhyun, Jin, Kyo-Won
Published in 2020 IEEE International Solid- State Circuits Conference - (ISSCC) (01.02.2020)
Published in 2020 IEEE International Solid- State Circuits Conference - (ISSCC) (01.02.2020)
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Conference Proceeding
18.3 A 1.2V 64Gb 8-channel 256GB/s HBM DRAM with peripheral-base-die architecture and small-swing technique on heavy load interface
Jong Chern Lee, Jihwan Kim, Kyung Whan Kim, Young Jun Ku, Dae Suk Kim, Chunseok Jeong, Tae Sik Yun, Hongjung Kim, Ho Sung Cho, Yeon Ok Kim, Jae Hwan Kim, Jin Ho Kim, Sangmuk Oh, Hyun Sung Lee, Ki Hun Kwon, Dong Beom Lee, Young Jae Choi, Jeajin Lee, Hyeon Gon Kim, Jun Hyun Chun, Jonghoon Oh, Seok Hee Lee
Published in 2016 IEEE International Solid-State Circuits Conference (ISSCC) (01.01.2016)
Published in 2016 IEEE International Solid-State Circuits Conference (ISSCC) (01.01.2016)
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Conference Proceeding