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A smart Trojan circuit and smart attack method in AES encryption circuits
by
Yoshimura, Masayoshi
,
Ogita
,
Amy
,
Hosokawa, Toshinori
Published in
2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)
(01.10.2013)
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Conference Proceeding
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engineering
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aes encryption circuits
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clocks
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design-for-testability
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discrete fourier transforms
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secure design
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trojan circuit
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English
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IEEE Electronic Library Online
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